ATSAMA5D225C-D1M-CU vs ATSAMA5D28B-CN Comparison
Detailed side-by-side comparison of ATSAMA5D225C-D1M-CU by Microchip Technology and ATSAMA5D28B-CN by Microchip Technology. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Microchip Technology
ATSAMA5D225C-D1M-CU - 500MHz Cortex-A5 MPU w/ 128Mb DDR2 SiP | Microchip
ATSAMA5D225C-D1M-CU β ActiveMicrochip Technology
ATSAMA5D28B-CN - Cortex-A5 500MHz MPU, 128MB DDR2 | Microchip
ATSAMA5D28B-CN β ActiveSpecification Comparison
| Parameter | ATSAMA5D225C-D1M-CU | ATSAMA5D28B-CN |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Category | Microcontrollers | Microcontrollers |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $12.60 | $17.95 |
| Core Processor | ARM Cortex-A5 | β |
| Number of Cores | 1 Core, 32-Bit | β |
| Maximum CPU Clock | 500 MHz | 500 MHz |
| Integrated DRAM | 128 Mbit DDR2 SDRAM (SiP) | 128 Mbytes DDR2/DDR3L/LPDDR2/LPDDR3 controller |
| ROM / Boot Code | 160 KB ROM | β |
| Graphics Acceleration | Yes (LCD controller up to WXGA 1366x768) | β |
| RAM Controllers | LPDDR1, LPDDR2, LPDDR3, DDR2, DDR3, DDR3L, QSPI | β |
| Ethernet | 10/100/1000 GMAC | 10/100 MAC with IEEE 1588 + GMAC |
| USB | 1x HSIC, 1x USB 2.0 HS Host/Device | β |
| CAN | CAN-FD | 2x CAN-FD |
| Security | Arm TrustZone, secure boot, tamper detection, AES/SHA/TRNG | β |
| Touch Controller | Peripheral Touch Controller (PTC) integrated | β |
| Audio | Embedded audio subsystem (I2S, Class-D amplifier) | β |
| Package | 196-ball TFBGA 11x11 mm, 0.8 mm pitch | 289-ball LFBGA, 14 mm x 14 mm |
| Operating Temperature | -40C to +85C (Industrial, IND TEMP) | -40 C to +85 C (industrial) |
| Supply Voltage | 1.2 V core (per typical SiP) | 3.3 V I/O, 1.2 V core (internal LDO) |
| Mounting Type | Surface Mount (BGA) | Surface Mount (BGA) |
| RoHS Status | Compliant (Green, lead-free) | Compliant |
| Core Architecture | β | Arm Cortex-A5 (Armv7-A) |
| FPU | β | VFPv4 (single/double precision) |
| L1 Instruction Cache | β | 32 Kbytes |
| L1 Data Cache | β | 32 Kbytes |
| L2 Cache | β | 128 Kbytes (configurable as SRAM) |
| MMU | β | Yes (full translation) |
| TrustZone | β | Yes (Arm TrustZone) |
| NEON Media Engine | β | Yes (SIMD) |
| External Memory Bus | β | 16-bit ECC-capable |
| USB Controllers | β | 2x USB 2.0 High-Speed (Host/Device) |
| SD/MMC | β | 3x SD/SDIO/MMC/e.MMC |
| UART / SPI / I2C | β | Multiple instances (peripheral multiplexing) |
| Crypto Accelerator | β | AES, SHA, TRNG, secure boot |
| MSL Level | β | 3 (168 hours) |