The OPA828IDR is Texas Instruments' high-speed JFET-input operational amplifier delivering a 45 MHz gain bandwidth product, 150 V/us slew rate, and 4 nV/√Hz input voltage noise in an 8-pin SOIC package. It combines 50 uV input offset voltage, 0.45 uV/C offset drift, and 1 pA typical input bias current with a rail-to-rail output stage, operating from ±4 V to ±18 V (8 V to 36 V total) across -40C to +125C. TI positions the OPA828 as the next-generation successor to the OPA627 and OPA827. The part is active in lifecycle status, broadly stocked (XAIPART lists 99999 units), and priced at $2.80 at qty 1, dropping to $1.90 at qty 1000, as of 2026-09-04. This guide covers selection criteria, design-in practice, verified drop-in alternatives, and supply outlook for buyers and engineers.

Quick Answers: What Should Buyers and Engineers Know About the OPA828IDR?
The OPA828IDR is a single-channel, general-purpose precision op amp with a JFET input stage and rail-to-rail output (RRO). Its headline specifications: 45 MHz GBW, 150 V/us slew rate, 4 nV/√Hz voltage noise density at 1 kHz, 60 nVRMS integrated noise from 0.1 Hz to 10 Hz, 50 uV offset voltage, 0.45 uV/C drift, and 1 pA typical bias current. It runs on dual supplies from ±4 V to ±18 V, meaning it survives legacy ±15 V industrial rails with margin, and its RRO output maximizes dynamic range at low supply voltages. The 'IDR' suffix means 8-pin SOIC (D package), tape and reel (R), rated -40C to +125C.
For buyers: it is in stock at XAIPART (99999 units, MOQ 1) with tiered pricing of $2.80 (1+), $2.52 (10+), $2.27 (100+), $2.09 (500+), and $1.90 (1000+), as of 2026-09-04. Major distributors (DigiKey, Mouser, LCSC) also list the part with same-day shipping when stocked. Answers to the most common buyer and engineer questions appear in the FAQ section below the article body.
Technical Guide: How Do You Select and Design In the OPA828IDR?
When the OPA828IDR Is the Right Choice
Choose the OPA828IDR when your signal chain needs at least 20 MHz of closed-loop bandwidth, fast 150 V/us slew-limited settling, or MUX-friendly inputs for multiplexed data acquisition. Its rare combination of broadband speed with picoampere bias current and 50 uV DC offset suits circuits where both dynamic and static accuracy matter. Choose a lower-bandwidth part (see the comparison section) when bandwidth requirements stay below 10 MHz and cost per channel dominates.
Supply and Decoupling Design
The OPA828IDR operates from ±4 V to ±18 V dual supplies (8 V to 36 V total single-supply equivalent). Place 0.1 uF ceramic decoupling capacitors within 3 mm of each supply pin — V+ on pin 7 and V- on pin 4 — and add a 2.2 uF to 10 uF bulk capacitor per rail. Keep ground return paths short and use a solid ground plane; a 45 MHz bandwidth device can oscillate in high-gain configurations without careful layout. The ±18 V maximum rating gives comfortable margin on ±15 V industrial rails, while the RRO output preserves swing on 5 V or ±5 V systems.
Photodiode Transimpedance Amplifier Design
For a photodiode TIA, the 1 pA input bias current produces negligible current error even with gigaohm-scale feedback resistors, and the 4 nV/√Hz voltage noise keeps amplifier noise below the shot noise of most photodiodes at typical photocurrents. Place the feedback resistor directly across pins 2 (IN-) and 6 (OUT), and use a small feedback capacitor of 0.5–2 pF to guarantee phase margin with high diode capacitance. A 1 Mohm feedback resistor yields a photodetection corner around 45 kHz-class closed-loop bandwidth depending on diode capacitance. The MUX-friendly inputs tolerate charge injection when multiple photodiode channels share one amplifier through an analog multiplexer — a mode that can damage conventional high-speed JFET amplifiers.
ADC Driver and Buffer Design
Driving 16- to 18-bit SAR ADCs with a 1 us acquisition window requires fast settling: the 150 V/us slew rate combined with 45 MHz GBW supports microsecond-class settling to 16-bit levels in unity-gain buffer configurations. Insert a small series resistor of 10–50 ohm between the amplifier output (pin 6) and the ADC input to isolate the capacitive sampling load and preserve phase margin. The 50 uV offset and 0.45 uV/C drift minimize DC error at the converter input without trim circuitry.
Audio and Instrumentation Design
For high-fidelity audio front ends, the 60 nVRMS of 0.1–10 Hz noise and 4 nV/√Hz broadband density keep the amplifier below the thermal noise of most source impedances, while the JFET input's 1 pA bias means moving-coil step-up transformers and high-impedance phono sources see no loading error. The 150 V/us slew rate ensures full-power bandwidth far beyond the audio band, avoiding slew-induced distortion (TIM). In test and measurement, active filter stages benefit from the 45 MHz GBW, keeping filter corner frequencies and Q accurate well into the hundreds of kilohertz, and the 36 V total supply range allows direct operation from traditional instrument supplies.
Package, Pinout, and Replacement Cautions
The OPA828IDR is the 8-pin SOIC (D) tape-and-reel version. TI also offers the OPA828 in a thermally enhanced 8-pin HVSSOP PowerPAD package with a different footprint that is NOT pin-compatible with the SOIC — always match the D suffix and packing suffix to your assembly. When replacing an OPA627, verify compensation and bias-current paths: community feedback documents a legacy photodiode TIA where a direct swap failed until bias-current return and compensation paths were adjusted, despite pin compatibility. The OPA828's 1 pA bias current differs from OPA627's, so feedback capacitance and input bias return paths must be checked before swapping.
Alternatives & Comparison: Which Parts Can Replace the OPA828IDR?
The verified alternatives span TI's own family and an Analog Devices option. All values below come from the verified product database; substitute only after verifying slew rate and stability in your circuit.
| Parameter | OPA828IDR | OPA827AIDR | OPA627AU | AD8610ARZ |
|---|---|---|---|---|
| Gain Bandwidth | 45 MHz | 22 MHz (-51%) | 16 MHz (-64%) | ~25 MHz (-44%) |
| Slew Rate | 150 V/us | ~22 V/us (-85%) | [DATA_NEEDED: slew rate] | 40 V/us |
| Input Type | JFET, MUX-friendly | JFET | JFET | JFET, pA-class bias |
| Output | Rail-to-rail output | Same family | [DATA_NEEDED: output type] | RRO |
| Positioning | Next-gen successor to OPA627/OPA827 | Pin-compatible, lower bandwidth | Predecessor; OPA828 is its drop-in upgraded replacement | Referenced in TI E2E TIA threads as alternative |
Selection guidance: Choose OPA828IDR when you need ≥20 MHz closed-loop bandwidth, 150 V/us slew rate, or MUX-friendly inputs. Choose OPA827AIDR when bandwidth below 10 MHz suffices and maximum DC precision per dollar matters — it shares the same JFET family and pinout, making it a pin-compatible, lower-cost option. The OPA627AU remains relevant only for legacy sockets; TI lists the OPA828 as its drop-in upgraded replacement, and a reverse swap is possible where bandwidth is unneeded. The AD8610ARZ offers similar pA-class bias current and RRO at ~25 MHz GBW and 40 V/us slew — verify stability before substitution.
Industry Insight: What Is the Market and Supply Position of the OPA828IDR?
The lifecycle status of the OPA828IDR is active per TI, so it is not a legacy or last-time-buy part. It is broadly stocked across the distribution channel: XAIPART lists 99999 units in stock with MOQ 1 as of 2026-09-04, and the DigiKey listing states 'Buy now, ships today' with LCSC also showing stock. When distributors hold stock, the part ships same day with standard carrier lead times of a few days; factory lead times are not a concern for production planning. For guaranteed continuity, plan standard replenishment through franchised distributors rather than spot-market purchases. [DATA_NEEDED: long-term lifecycle commitment date, competitive market-share data]
Trends & Outlook: What Should Buyers Watch for the OPA828IDR?
Three factors anchor the buying outlook. First, the OPA828 occupies the next-generation slot in TI's precision JFET lineup — as the designated successor to the OPA627/OPA827 family, design-ins should favor it for new boards, while OPA827AIDR remains the pin-compatible cost-down for sub-10 MHz designs. Second, pricing scales favorably with volume: from $2.80 at qty 1 to $1.90 at qty 1000 (as of 2026-09-04), a 32% reduction at the 1k tier — production buyers should consolidate to the 500+ or 1000+ tiers. Third, distribution stock is currently deep (99999 units at XAIPART) and lifecycle status is active, so allocation risk is low; monitor live inventory at franchised distributors rather than the spot market. Engineers migrating legacy ±15 V designs should note the ±18 V maximum rating and MUX-friendly inputs, which keep the OPA828IDR relevant for both legacy industrial rails and modern multiplexed, low-voltage signal chains. [VERIFY_NEEDED: future pricing trend direction]
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