PCA9517A
PCA9517A - Level-Translating I2C-Bus Repeater | NXP Semiconductors
The NXP PCA9517A is a CMOS level-translating I2C-bus repeater that shifts between low voltages down to 0.9 V on the A-side and 2.7 V to 5.5 V on the B-side, housed in a standard 8-pin SOIC package. It provides two-channel bidirectional buffering for both SDA and SCL while retaining all operating modes and features of the I2C-bus system during level shifts.
A level-translating I2C-bus repeater is an interface IC that sits between two segments of an I2C or SMBus network, allowing devices operating from different supply rails - for example a 1.8 V microcontroller and a 3.3 V or 5 V peripheral - to communicate on the same bus. As a member of the I2C buffer/repeater/extender family within NXP's interface portfolio, it solves both voltage-domain mismatch and bus-capacitance limits in a single surface-mount device.
Key features include voltage-level translation from 0.9 V up to 5.5 V, open-drain I2C-compatible I/O configuration, an active-high repeater-enable (EN) input for bus segmentation and power sequencing, and drivers that stay disabled until both VCC(A) (above 0.8 V) and VCC(B) (above 2.5 V) are present, preventing bus lock-up during power-up. SMBus compatibility extends its use into system-management designs.
Technically, the A-side I/O and logic are powered by VCC(A) while the B-side is powered by VCC(B); the internal driver applies a static offset on the B-side, which means port B must not be connected to another device with rise-time accelerators (such as PCA9510/9511/9512/9513/9514/9515A/9516A or PCA9518). Pull-up resistors on both segments provide the logic-high levels, as with any standard open-drain I2C bus.
Typical applications include interfacing 1.2 V to 1.8 V low-voltage SoCs with 3.3 V or 5 V sensor and EEPROM buses, extending I2C reach in telecom and networking backplanes, and managing multi-rail power supplies in industrial systems.
Designers should keep EN changes limited to bus-idle states to avoid corrupting in-progress transfers, and verify that chained buffer topologies follow the NXP datasheet restrictions.
This page synthesizes verified datasheet facts, cross-brand drop-in options such as TI's TCA9517, and practical design notes not found in the manufacturer datasheet alone.
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