5M160ZT100C5N vs 5M160ZE64C5N Comparison
Detailed side-by-side comparison of 5M160ZT100C5N by Altera and 5M160ZE64C5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | 5M160ZT100C5N | 5M160ZE64C5N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4.75 | $4.95 |
| Series | MAX V | MAX V |
| Device Family | MAX V CPLD | MAX V (5M160Z) |
| Macro Cells | 128 | — |
| Logic Elements (LEs) | 160 | — |
| User I/Os | 79 | — |
| Number of Logic Array Blocks (LABs) | 8 | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Maximum Operating Frequency | 152 MHz (typical, internal) | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 1.5 V to 3.3 V | — |
| Operating Temperature | 0 °C to +85 °C (commercial) | 0°C to +85°C (commercial) |
| Package | TQFP-100 | 64-pin EQFP (E64) with exposed pad |
| Mounting Type | Surface Mount | Surface Mount |
| MSL Level | 3 | 3 |
| RoHS Status | Compliant | Compliant |
| Lead-Free | Yes | — |
| Programming Interface | JTAG (IEEE 1149.1) - in-system | JTAG (IEEE 1149.1) / In-system |
| Logic Elements (LE) | — | 160 |
| Macrocells | — | 128 |
| User I/O Pins | — | 54 |
| Maximum Operating Frequency (fMAX) | — | 118.3 MHz |
| Pin-to-Pin Logic Delay (tPD) | — | 1.4 ns (per datasheet) |
| Configuration Memory | — | Non-volatile Flash |
| Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Bank Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| User Flash Memory | — | 8 Kbits |