5M2210ZF256C4N vs 5M2210ZF256A5N Comparison
Detailed side-by-side comparison of 5M2210ZF256C4N by Altera and 5M2210ZF256A5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
5M2210ZF256C4N - MAX V CPLD, 1700 LE, FBGA-256, C4 Speed | Intel / Altera
5M2210ZF256C4N ✓ ActiveSpecification Comparison
| Parameter | 5M2210ZF256C4N | 5M2210ZF256A5N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.29 | $20.90 |
| Family | MAX V | — |
| Device | 5M2210Z | — |
| Logic Elements (LEs) | 1700 | — |
| Logic Array Blocks (LABs) | 221 | — |
| User Flash Memory | 8192 bits | — |
| Internal RAM | 212 Kbits | — |
| Maximum User I/O (family) | 203 | — |
| User I/O (this package) | 160 | — |
| Package | FBGA-256 (FineLine BGA) | — |
| Operating Temperature | 0C to 85C (Commercial) | — |
| Speed Grade | C4 (tPD ~4 ns class) | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Bank Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Number of I/O Banks | 4 | — |
| Programming Interface | JTAG (IEEE 1149.1) / IEEE 1532 ISP | — |
| Configuration Method | Internal flash (instant-on < 1 ms) | — |
| Process Technology | 0.30 um 6-metal-layer CMOS | — |
| RoHS Status | Compliant (Pb-free ball finish) | [DATA_NEEDED: RoHS status declaration] |
| Programmable Logic Type | — | CPLD (Flash PLD), MAX V Family |
| Macro Cells | — | 1700 |
| User I/Os | — | 203 |
| Number of Inputs | — | 203 |
| Maximum Internal Frequency | — | 201.1 MHz |
| Propagation Delay | — | 11.2 ns |
| Core Supply Voltage | — | 1.8 V |
| Technology | — | CMOS |
| Package Type | — | 256-ball PBGA / FBGA (S-PBGA-B256) |
| Package Shape | — | Square |
| Terminal Form | — | Ball |
| Terminal Pitch | — | 1.000 mm |
| Number of Terminals | — | 256 |
| Operating Temperature Range | — | -40 C to +105 C (fetched product data) |
| In-System Programming | — | Yes |
| JTAG Boundary Scan | — | Yes |