74HC165D vs 74HC165D,653 Comparison
Detailed side-by-side comparison of 74HC165D by Nexperia and 74HC165D,653 by Nexperia. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Nexperia
74HC165D,653 - 8-Bit Parallel-In/Serial-Out Shift Register | Nexperia
74HC165D,653 ✓ ActiveSpecification Comparison
| Parameter | 74HC165D | 74HC165D,653 |
|---|---|---|
| Brand | Nexperia | Nexperia |
| Category | Logic ICs | Logic ICs |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.15 | $0.15 |
| Logic Type | Shift Register (Parallel-in / Serial-out, PISO) | Shift Register (Parallel-in/Serial-out) |
| Number of Elements | 1 | 1 |
| Bits per Element | 8 | — |
| Function | 8-bit parallel-load / serial-in shift register with complementary serial outputs | Parallel or Serial to Serial |
| Supply Voltage (Vcc) | 2.0 V to 6.0 V | — |
| Input Type | Standard CMOS (HC); TTL-compatible variant is 74HCT165 | — |
| Output Type | Complementary CMOS (Q7, Q7-bar) | Differential (Q7 and Q7-bar complementary outputs) |
| Logic Family | 74HC / 74HCT (high-speed Si-gate CMOS, LSTTL pin-compatible) | — |
| Parallel Load | Asynchronous, active-low SH/LD | — |
| Serial Input | Synchronous DS on rising CLK edge | — |
| Operating Temperature | -40 C to +125 C | -40 C to +125 C |
| Package | 16-pin SOIC (SOT109-1) | 16-pin SOIC (SOT109-1) |
| Mounting Type | Surface Mount | Surface Mount |
| MSL Level | 1 (unlimited) | 1 (per JEDEC J-STD-020) |
| RoHS Status | Compliant | Compliant |
| JEDEC Compliance | JEDEC standard no. 7A | JESD7A (per datasheet) |
| Number of Bits per Element | — | 8 |
| Supply Voltage (VCC) | — | 2 V to 6 V |
| Input Voltage | — | 0 V to VCC |
| Output Drive (IO) | — | ±5.2 mA |
| Propagation Delay (tpd) | — | 6 ns typical at VCC = 5 V, CL = 50 pF [DATA_NEEDED: explicit propagation delay value] |
| Pin Compatibility | — | LSTTL 74LS165 |
| Technology | — | High-speed Si-gate CMOS |