AD7780BRZ-REEL vs AD7730BRZ-REEL Comparison
Detailed side-by-side comparison of AD7780BRZ-REEL by Analog Devices and AD7730BRZ-REEL by Analog Devices. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Analog Devices
AD7780BRZ-REEL - 24-Bit Pin-Prog Low-Power Sigma-Delta ADC | ADI
AD7780BRZ-REEL ✓ ActiveAnalog Devices
AD7730BRZ-REEL - 24-Bit Sigma-Delta Bridge Transducer ADC | ADI
AD7730BRZ-REEL ✓ ActiveSpecification Comparison
| Parameter | AD7780BRZ-REEL | AD7730BRZ-REEL |
|---|---|---|
| Brand | Analog Devices | Analog Devices |
| Category | ADC/DAC | ADC/DAC |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $5.18 | $18.55 |
| Resolution | 24 bits | 24-bit |
| Converter Type | Sigma-Delta (Σ-Δ) | — |
| Number of Channels | 1 differential input | 1 differential bridge input |
| Analog Supply Voltage (AVDD) | 2.7 V to 5.25 V | 5 V (typ) |
| Digital Supply Voltage (DVDD) | 2.7 V to 5.25 V | 3 V to 5.25 V |
| Supply Current | 330 µA typical | — |
| On-board PGA Gain Range | 1 to 128 (pin-programmable, 1/2/4/8/16/32/64/128) | — |
| Update Rate | 10 Hz (low-noise) or 16.7 Hz (low-power) | — |
| Reference Input | External or AVDD-tied | — |
| On-chip Oscillator | Yes (no external crystal required) | — |
| Common-Mode Rejection (50 Hz / 60 Hz) | [DATA_NEEDED: CMRR at 50/60 Hz from datasheet] | — |
| Output Data Rate Resolution | 20 bits noise-free (typical, G=128) | — |
| Package | 14-SOIC (R-14) narrow body | 24-pin SOIC Wide Body (SOIC-24/RW) |
| Mounting Type | Surface Mount | Surface Mount, Tape & Reel |
| Operating Temperature Range | -40 °C to +85 °C (industrial) | -40 °C to +85 °C (industrial) |
| Filter Type | Sinc³ digital filter, pin-programmable | — |
| Interface | 2-wire serial (read-only via DRDY pin) | Serial, three-wire configurable |
| Power-Down Current | [DATA_NEEDED: standby current] | — |
| RoHS Status | Compliant | Compliant |
| MSL Level | 1 (unlimited floor life per JEDEC J-STD-020) | — |
| ADC Architecture | — | Sigma-Delta |
| Output Data Rate (max) | — | 1.2 kSPS |
| Power Dissipation | — | 125 mW (typ) |
| Offset Drift | — | < 5 nV/°C |
| Gain Drift | — | < 2 ppm/°C |
| Input Range | — | Bipolar differential (bridge sensor level) |
| Calibration | — | Self-calibration and system calibration |