AD9235BRURL7-65 vs AD9235BRURL7-40 Comparison
Detailed side-by-side comparison of AD9235BRURL7-65 by Analog Devices and AD9235BRURL7-40 by Analog Devices. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Analog Devices
AD9235BRURL7-65 - 12-Bit 65 MSPS ADC, 3V, TSSOP-28 | Analog Devices
AD9235BRURL7-65 ✓ ActiveSpecification Comparison
| Parameter | AD9235BRURL7-65 | AD9235BRURL7-40 |
|---|---|---|
| Brand | Analog Devices | Analog Devices |
| Category | ADC/DAC | ADC/DAC |
| Lifecycle Status | Active | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $11.05 | $10.85 |
| Resolution | 12 bits | 12 bits |
| Number of Channels | 1 | — |
| Sampling Rate (Max) | 65 MSPS | — |
| Architecture | Pipelined | Pipelined |
| Supply Voltage | 3 V (2.7 V to 3.6 V) | 2.7 V to 3.6 V (single 3 V supply) |
| Power Consumption | 300 mW at 65 MSPS | — |
| Analog Input Bandwidth | 500 MHz | [DATA_NEEDED: input bandwidth MHz] |
| Analog Input Range | 1 V p-p to 2 V p-p | — |
| Analog Input Type | Differential | — |
| SNR (to Nyquist, -1 dBFS) | 70 dBFS | — |
| SFDR (to Nyquist) | 85 dBFS | — |
| DNL | +/-0.4 LSB (typical) | — |
| Data Interface | Parallel (LVCMOS/TTL) | — |
| Output Format | Offset binary or twos complement | — |
| Reference | Internal (on-chip) | Internal 2.5 V or external |
| Clock Duty-Cycle Stabilizer | Yes (integrated) | — |
| Operating Temperature Range | -40C to +85C | — |
| Package | 28-TSSOP (4.40 mm body width) | 28-TSSOP (4.40 mm body width) |
| Mounting Type | Surface Mount | Surface Mount |
| MSL Level | 1 (unlimited floor life) | [DATA_NEEDED: MSL level] |
| RoHS Status | [DATA_NEEDED: RoHS status - not in web data] | Compliant (RU package suffix) |
| Sampling Rate | — | 40 MSPS |
| Number of Inputs | — | 1 |
| Supply Current (typ @ 40 MSPS) | — | [DATA_NEEDED: supply current at 40 MSPS] |
| Power Dissipation (typ @ 40 MSPS) | — | 110 mW (typical) |
| Input Type | — | Differential (SHA), single-ended capable |
| Input Range | — | 1 Vp-p differential (with 2 Vp-p option) |
| SNR (typical) | — | [DATA_NEEDED: SNR dBFS] |
| SFDR (typical) | — | [DATA_NEEDED: SFDR dBc] |
| ENOB | — | [DATA_NEEDED: effective number of bits] |
| Digital Interface | — | Parallel CMOS, 12-bit |
| Operating Temperature | — | -40°C to +85°C |
| Packaging | — | Tape & Reel (TR - R7) |