ADF4193BCPZ vs ADF4106BRU Comparison
Detailed side-by-side comparison of ADF4193BCPZ by Analog Devices and ADF4106BRU by Analog Devices. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Analog Devices
ADF4193BCPZ - 3.5 GHz Fast-Settling PLL Synthesizer | Analog Devices
ADF4193BCPZ ✓ Active
Specification Comparison
| Parameter | ADF4193BCPZ | ADF4106BRU |
|---|---|---|
| Brand | Analog Devices | Analog Devices |
| Category | Clock & Timing | Clock & Timing |
| Lifecycle Status | Active | Active |
| Device Type | RF PLL frequency synthesizer | — |
| Maximum RF Input Frequency | 3.5 GHz | — |
| Minimum RF Input Frequency | 300 MHz | — |
| Maximum Output Frequency | 470 MHz | — |
| Output Channel Count | 1 | — |
| Package | 32-lead WFQFN with exposed pad | 16-pin TSSOP, 0.173 inch / 4.40 mm width |
| Operating Temperature Range | -40°C to +85°C | — |
| Phase Detector Type | Low-noise digital phase-frequency detector | — |
| Charge Pump Type | Precision differential charge pump | — |
| Loop Architecture | Dual-band narrow-band and wide-band operation | — |
| Control Interface | [DATA_NEEDED: serial interface type and electrical protocol] | — |
| Supply Voltage Range | [DATA_NEEDED: analog and digital supply voltage ranges] | — |
| Reference Input Frequency Range | [DATA_NEEDED: reference input frequency range] | — |
| Phase Noise | [DATA_NEEDED: phase noise versus offset frequency] | — |
| Lock Time | [DATA_NEEDED: lock time and test conditions] | — |
| Reference Spur | [DATA_NEEDED: reference spur level and test conditions] | — |
| RF Output Power | [DATA_NEEDED: RF output power and load condition] | — |
| Integrated Reference Divider | [DATA_NEEDED: reference divider ratio range] | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | unknown |
| REACH Status | [DATA_NEEDED: REACH status] | unknown |
| Mounting Type | Surface mount | Surface mount |
| Exposed Thermal Pad | Present | — |
| Product Type | — | Integer-N PLL frequency synthesizer |
| Maximum Synthesizer Frequency | — | 6.0 GHz |
| Minimum Reference Input Frequency | — | 20 MHz |
| Number of Circuits | — | 1 |
| Architecture | — | Integer-N |
| Power-Supply Voltage | — | 3.3 V |
| Charge-Pump Supply | — | Separate VP supply |
| Prescaler | — | Programmable dual-modulus P/(P+1) |
| Reference Divider | — | Programmable |
| A Counter | — | 6-bit programmable counter |
| B Counter | — | Programmable counter |
| Charge-Pump Current | — | Programmable |
| Anti-Backlash Pulse Width | — | Programmable |
| Serial Interface | — | 3-wire serial interface |
| AEC-Q100 Qualification | — | not_applicable |