ADF4372BCCZ vs ADF5610BCCZ Comparison
Detailed side-by-side comparison of ADF4372BCCZ by Analog Devices and ADF5610BCCZ by Analog Devices. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Analog Devices
ADF4372BCCZ - 62.5MHz-16GHz Integer-N PLL with Integrated VCO | Analog Devices
ADF4372BCCZ ✓ Active
Specification Comparison
| Parameter | ADF4372BCCZ | ADF5610BCCZ |
|---|---|---|
| Brand | Analog Devices | Analog Devices |
| Category | Clock & Timing | Clock & Timing |
| Lifecycle Status | Active | Active |
| Device Type | Integer-N / Fractional-N PLL frequency synthesizer with integrated VCO | Integer-N/Fractional-N PLL frequency synthesizer with integrated VCO |
| Output Frequency Range | 62.5 MHz to 16 GHz | — |
| VCO Fundamental Frequency Range | 4000 MHz to 8000 MHz | — |
| Frequency Multiplier Output Range | 8 GHz to 16 GHz (RF16x) | — |
| Output Divide Ratios | 1, 2, 4, 8, 16, 32, 64 | — |
| Lowest Divide Output | 62.5 MHz at RF8x | — |
| Auxiliary Output | RFAUX8x duplicates the RF8x output | — |
| PLL Architecture | Integer-N and fractional-N with external loop filter | — |
| Loop Filter | External (user selected) | — |
| Reference Input | External reference frequency required | — |
| Double-Buffered Registers | FRAC1, MOD2, FRAC2, reference doubler, RDIV2, R counter, charge pump current | — |
| Number of Channels | 1 | — |
| Package | 48-lead TFLGA with exposed pad (CCZ) | 48-VFLGA with exposed pad |
| Mounting Type | Surface Mount | Surface mount |
| Operating Temperature Range | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Supply Voltage Range | [DATA_NEEDED: supply voltage range] | [DATA_NEEDED: supply voltage range] |
| Phase Noise | [DATA_NEEDED: phase noise at 1 kHz offset] | [DATA_NEEDED: phase noise specifications] |
| Lock Time | [DATA_NEEDED: lock time] | — |
| RoHS Status | unknown | [DATA_NEEDED: RoHS status] |
| REACH Status | unknown | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | not_applicable | [DATA_NEEDED: AEC-Q100 qualification] |
| Maximum RF Output Frequency | — | 14.6 GHz |
| Integrated VCO Fundamental Frequency Range | — | 3650 MHz to 7300 MHz |
| Differential Output Divide Ratios | — | 1, 2, 4, 8, 16, 32, 64, 128 |
| Minimum RF Output Frequency | — | 57 MHz |
| Serial Interface | — | 3-wire SPI |
| Package Code | — | HLGA |
| Terminal Count | — | 48 |
| Package Shape | — | Square |
| Temperature Grade | — | Industrial |
| Reference Requirement | — | External reference source |
| Loop Filter Requirement | — | External loop filter |
| Output Configuration | — | Single-ended RFOUT and differential divided output |
| Supported Synthesis Modes | — | Integer-N and fractional-N |
| Programming Support | — | SDP-S software programming through USB interface |
| Lead-Free Status | — | [DATA_NEEDED: lead-free status] |
| Lock Detect or Status Function | — | [DATA_NEEDED: lock detect and status function details] |