ADS6143IRHBR vs ADS6144IRHBR Comparison
Detailed side-by-side comparison of ADS6143IRHBR by Texas Instruments and ADS6144IRHBR by Texas Instruments. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Texas Instruments
ADS6143IRHBR - 14-Bit 80MSPS Low-Power ADC | Texas Instruments
ADS6143IRHBR ✓ ActiveTexas Instruments
ADS6144IRHBR - 14-Bit 105MSPS Low-Power ADC | Texas Instruments
ADS6144IRHBR ✓ ActiveSpecification Comparison
| Parameter | ADS6143IRHBR | ADS6144IRHBR |
|---|---|---|
| Brand | Texas Instruments | Texas Instruments |
| Category | ADC/DAC | ADC/DAC |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $20.90 | $18.20 |
| Resolution | 14 bit | 14 bit |
| Number of Input Channels | 1 | — |
| Sampling Rate (max) | 80 MSPS | — |
| Architecture | Pipelined | Pipelined |
| Input Type | Differential | Differential (analog buffered) |
| Digital Output Interface | Parallel CMOS or DDR LVDS (selectable) | — |
| Analog Supply Voltage | 3.3 V | — |
| Digital Supply Voltage | 1.8 V (LVDS mode) / 3.3 V (CMOS mode) | — |
| Integral Nonlinearity (INL) | 0.0244% (typ) | — |
| SNR at 70 MHz Input | 73 dBFS (typ) | — |
| SFDR | 85 dBc (typ) | — |
| Integral Aperture Delay | [DATA_NEEDED: aperture delay value] | — |
| Power Consumption | [DATA_NEEDED: power dissipation value] | — |
| Programmable Gain | 0 to 6 dB in 1-dB steps (4-bit) | — |
| Operating Temperature Range | -40C to +85C (Industrial) | -40 C to +85 C (Industrial) |
| Package | 32-pin VQFN (RHB), 5x5 mm with exposed pad | 32-VQFN (RHB) 5x5 mm with exposed thermal pad |
| Mounting Type | Surface Mount | Surface Mount |
| MSL Level | [DATA_NEEDED: MSL rating] | 2 (per JEDEC J-STD-020) |
| RoHS Status | Compliant | Compliant |
| Lead-Free | Yes | — |
| Number of Channels | — | 1 |
| Sampling Rate (Maximum) | — | 105 MSPS |
| Full-Scale Input Range | — | 1.0 Vpp to 1.5 Vpp (programmable) |
| Analog Input Bandwidth | — | [DATA_NEEDED: input bandwidth MHz] |
| SNR (9.9 MHz input) | — | [DATA_NEEDED: SNR dBFS at 9.9 MHz] |
| SFDR (70 MHz input) | — | [DATA_NEEDED: SFDR dBFS at 70 MHz] |
| Power Dissipation | — | [DATA_NEEDED: power at 105 MSPS mW] |
| Output Interface | — | Parallel CMOS / DDR LVDS (selectable) |
| Output Data Format | — | Offset Binary, Twos Complement, or Gray Code |
| Reference | — | Internal or External |
| Supply Voltage (AVDD) | — | [DATA_NEEDED: AVDD V] |
| Wake-up / Sleep Mode | — | Yes (power-down pin) |