ATMEGA168PB-AUR vs ATMEGA168PA-AU Comparison

Detailed side-by-side comparison of ATMEGA168PB-AUR by Microchip Technology and ATMEGA168PA-AU by Microchip Technology. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Microchip Technology
ATMEGA168PB-AUR ATMEGA168PB-AUR - 16KB AVR MCU 20MHz TQFP-32 | Microchip

ATMEGA168PB-AUR - 16KB AVR MCU 20MHz TQFP-32 | Microchip

ATMEGA168PB-AUR βœ“ Active
Microchip Technology
ATMEGA168PA-AU ATMEGA168PA-AU - 8-bit AVR MCU 20MHz 16KB Flash TQFP-32 | Microchip

ATMEGA168PA-AU - 8-bit AVR MCU 20MHz 16KB Flash TQFP-32 | Microchip

ATMEGA168PA-AU βœ“ Active

Specification Comparison

Parameter ATMEGA168PB-AUR ATMEGA168PA-AU
Brand Microchip Technology Microchip Technology
Category Microcontrollers Microcontrollers
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $1.58 $0.98
Core Processor AVR 8-bit RISC β€”
Program Memory Size 16 KB (8K x 16) ISP Flash β€”
EEPROM Size 512 B β€”
SRAM Size 1 KB β€”
Maximum Clock Frequency 20 MHz 20 MHz
Throughput Approaching 1 MIPS per MHz β€”
General Purpose I/O Lines 27 β€”
Working Registers 32 general-purpose β€”
Supply Voltage Range 1.8 V to 5.5 V 1.8 V to 5.5 V
Operating Temperature -40 C to +85 C -40C to +85C
Package / Case 32-TQFP (7x7 mm) β€”
Mounting Type Surface Mount Surface Mount
ADC Resolution 10-bit 10-bit
Timer/Counters Three flexible timer/counters with compare modes β€”
Communication Interfaces USART, SPI, TWI (I2C) USART, SPI, TWI (I2C)
Packaging Tape & Reel (AUR suffix) β€”
RoHS Status Compliant (Pb-free, Halide-free, fully Green) Compliant
Series AVR ATmega, Functional Safety (FuSa) β€”
Core Size β€” 8-bit
Core Architecture β€” AVR RISC
Flash Memory β€” 16 KB (8K x 16)
EEPROM β€” 512 B
SRAM β€” 1 KB
Number of I/O Lines β€” 23
ADC Channels β€” 6 (8 in TQFP: ADC6/ADC7)
Timers/Counters β€” 2 x 8-bit, 1 x 16-bit
Package β€” 32-TQFP (7x7 mm)
Low Power Technology β€” picoPower
In-System Programming β€” Yes (ISP, read-while-write)

Datasheets & Resources

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