ATSAMA5D225C-D1M-CU vs ATSAMA5D22B-CUR Comparison
Detailed side-by-side comparison of ATSAMA5D225C-D1M-CU by Microchip Technology and ATSAMA5D22B-CUR by Microchip Technology. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Microchip Technology
ATSAMA5D225C-D1M-CU - 500MHz Cortex-A5 MPU w/ 128Mb DDR2 SiP | Microchip
ATSAMA5D225C-D1M-CU β ActiveMicrochip Technology
ATSAMA5D22B-CUR - ARM Cortex-A5 500MHz MPU, 196-TFBGA | Microchip
ATSAMA5D22B-CUR β ActiveSpecification Comparison
| Parameter | ATSAMA5D225C-D1M-CU | ATSAMA5D22B-CUR |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Category | Microcontrollers | Microcontrollers |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $12.60 | $9.10 |
| Core Processor | ARM Cortex-A5 | β |
| Number of Cores | 1 Core, 32-Bit | β |
| Maximum CPU Clock | 500 MHz | 500 MHz |
| Integrated DRAM | 128 Mbit DDR2 SDRAM (SiP) | β |
| ROM / Boot Code | 160 KB ROM | β |
| Graphics Acceleration | Yes (LCD controller up to WXGA 1366x768) | β |
| RAM Controllers | LPDDR1, LPDDR2, LPDDR3, DDR2, DDR3, DDR3L, QSPI | β |
| Ethernet | 10/100/1000 GMAC | 10/100/1000 Mbps with IEEE 1588 |
| USB | 1x HSIC, 1x USB 2.0 HS Host/Device | USB 2.0 High-Speed Host and Device |
| CAN | CAN-FD | 2x CAN-FD |
| Security | Arm TrustZone, secure boot, tamper detection, AES/SHA/TRNG | β |
| Touch Controller | Peripheral Touch Controller (PTC) integrated | β |
| Audio | Embedded audio subsystem (I2S, Class-D amplifier) | β |
| Package | 196-ball TFBGA 11x11 mm, 0.8 mm pitch | 196-TFBGA, 11x11 mm, 0.75 mm pitch |
| Operating Temperature | -40C to +85C (Industrial, IND TEMP) | β |
| Supply Voltage | 1.2 V core (per typical SiP) | 0.9 V core / 1.8 V / 3.3 V I/O (typical) |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| RoHS Status | Compliant (Green, lead-free) | Compliant |
| Core Architecture | β | ARM Cortex-A5 (32-bit, single-core) |
| L1 Instruction Cache | β | 128 Kbyte |
| L1 Data Cache | β | 128 Kbyte |
| L2 Cache | β | 32 Kbyte |
| NEON Media Engine | β | Yes (NEON MPE) |
| Floating Point Unit | β | VFPv4-D32 (single and double precision) |
| External Memory Controller | β | 16-bit DDR2/LPDDR/LPDDR2/DDR3(L) |
| Display Controller | β | 24-bit LCD with overlays, 2D graphics accelerator |
| Video Decoder | β | H.264 / MPEG-4 / VP8 / JPEG hardware decode |
| Crypto Accelerator | β | AES, SHA, TRNG; ARM TrustZone secure boot |
| Operating Temperature (Industrial) | β | -40C to +85C |
| MSL Level | β | 3 (per JEDEC J-STD-020) |
| Deep-Sleep Current | β | <5 uA with backup self-refresh |