ATSAMA5D31A-CUR vs ATSAMA5D31A-CU Comparison
Detailed side-by-side comparison of ATSAMA5D31A-CUR by Microchip Technology and ATSAMA5D31A-CU by Microchip Technology. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Microchip Technology
ATSAMA5D31A-CUR - 536MHz ARM Cortex-A5 MPU 324-LFBGA | Microchip
ATSAMA5D31A-CUR β ActiveMicrochip Technology
ATSAMA5D31A-CU - ARM Cortex-A5 MPU 536MHz 324-LFBGA | Microchip
ATSAMA5D31A-CU β ActiveSpecification Comparison
| Parameter | ATSAMA5D31A-CUR | ATSAMA5D31A-CU |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Category | Microcontrollers | Microcontrollers |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $12.85 | $5.65 |
| Core Architecture | ARM Cortex-A5 (32-bit) with FPU | ARM Cortex-A5 (32-bit) |
| Maximum CPU Clock | 536 MHz | 536 MHz |
| L1 Instruction Cache | 32 KB | β |
| L1 Data Cache | 32 KB | β |
| Internal SRAM | 128 KB | 128 KB |
| Core Supply Voltage | 1.2 V (typ) | β |
| I/O Supply Voltage | 1.8 V / 3.3 V | β |
| Package | 324-LFBGA (15 mm x 15 mm) | 324-LFBGA (15x15 mm) |
| Operating Temperature | -40 C to +85 C (industrial) | -40C to +85C (Industrial) |
| External Memory Interface | DDR2 / LPDDR2 (16-bit) | DDR2 / LPDDR / LPDDR2 (16-bit) |
| Ethernet | 2x 10/100/1000 MAC with IEEE 1588 | 10/100 MAC (MII/RMII) |
| USB | 2x USB 2.0 High-Speed Host + Device | 2x HS USB 2.0 (host + device) |
| Display Controller | Integrated LCD controller | β |
| Operating System Support | Linux, Buildroot, OpenWrt | β |
| RoHS Status | Compliant | Compliant (per DigiKey listing) |
| Mounting Type | Surface Mount (BGA) | β |
| DMIPS Performance | β | 850 DMIPS |
| L1 Cache | β | 32 KB instruction + 32 KB data |
| Floating Point Unit | β | Yes (VFPv4) |
| NEON Media Engine | β | Yes |
| Supply Voltage | β | 1.0 V core / 1.8 V DDR / 3.3 V I/O (typical) |
| Low-Power Mode Power | β | < 0.5 mW (deep-sleep retention) |
| CAN | β | 2x CAN 2.0B controllers |
| LCD Controller | β | Yes, with 2D graphics engine and resistive touchscreen |
| Image Sensor Interface | β | Yes (ISI, up to 12-bit) |
| Crypto Accelerator | β | AES + True Random Number Generator |
| Process Technology | β | 65 nm low-power CMOS |