ATSAMD20J18A-MNT vs ATSAMD20J14A-MNT Comparison
Detailed side-by-side comparison of ATSAMD20J18A-MNT by Microchip Technology and ATSAMD20J14A-MNT by Microchip Technology. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Microchip Technology
ATSAMD20J18A-MNT - 48MHz Cortex-M0+ MCU, 256KB Flash, 64-QFN
ATSAMD20J18A-MNT ✓ ActiveMicrochip Technology
ATSAMD20J14A-MNT - 48MHz Cortex-M0+ 16KB Flash MCU | Microchip
ATSAMD20J14A-MNT ✓ ActiveSpecification Comparison
| Parameter | ATSAMD20J18A-MNT | ATSAMD20J14A-MNT |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Category | Microcontrollers | Microcontrollers |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $3.41 | $1.18 |
| Core Architecture | ARM Cortex-M0+ (32-bit) | ARM Cortex-M0+ |
| Maximum CPU Frequency | 48 MHz | — |
| Flash Program Memory | 256 KB | — |
| SRAM | 32 KB | 2 KB |
| Supply Voltage Range | 1.62 V to 3.63 V | 1.6 V to 3.6 V |
| Operating Temperature Range | -40 °C to +105 °C | -40 C to +105 C (industrial) |
| Package | 64-pin QFN (9x9 mm, MNT suffix = Tape and Reel) | 64-pin QFN (9x9 mm) with exposed pad |
| SERCOM Channels (configurable I²C/SPI/UART) | 6 | — |
| ADC | 12-bit, up to 20 channels, 350 ksps | 12-bit SAR |
| DAC | 10-bit, 1 channel, 350 ksps | 10-bit |
| PWM Timers (16-bit TCC) | 3 | — |
| Peripheral Touch Controller (PTC) | 256 channels | — |
| RTC | Yes, 32 kHz domain | — |
| CoreMark Score | 2.14 CoreMark/MHz (per datasheet) | — |
| Pin Count | 64 | — |
| Mounting Type | Surface Mount | Surface Mount |
| Debug Interface | SWD (2-wire) + cJTAG | — |
| RoHS Status | Compliant | Compliant |
| Family | — | SAM D20J |
| Bit Width | — | 32-bit |
| Maximum Clock Frequency | — | 48 MHz |
| CoreMark/MHz | — | 2.14 |
| Flash Memory | — | 16 KB (16K x 8) |
| Typical Supply Voltage | — | 3.3 V |
| Packaging | — | Tape and Reel |
| MSL Level | — | [DATA_NEEDED: MSL level] |
| Number of I/O Pins | — | [DATA_NEEDED: bonded-out I/O count for 64-pin variant] |