CDK1308CILP40 vs CDK1308AILP40 Comparison
Detailed side-by-side comparison of CDK1308CILP40 by MaxLinear and CDK1308AILP40 by MaxLinear. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | CDK1308CILP40 | CDK1308AILP40 |
|---|---|---|
| Brand | MaxLinear | MaxLinear |
| Category | ADC/DAC | ADC/DAC |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $5.70 | $4.10 |
| Resolution | 10 bit | 10 bit |
| Sampling Rate (max) | 40 MSPS | — |
| Family Sampling Rates | 20 / 40 / 65 / 80 MSPS | — |
| Architecture | Pipeline | Proprietary, digital error correction |
| Number of Channels | 1 | — |
| Analog Supply Voltage | 1.8 V | — |
| Digital I/O Supply Voltage | 1.7 V to 3.6 V | — |
| Power Dissipation (65 MSPS) | 38 mW | — |
| SNR | 61.6 dB at Fin = 8 MHz | — |
| Input Type | Single-ended / Differential | — |
| Reference Type | Internal | — |
| Output Interface | Parallel CMOS | — |
| Package | LQFP-40 | 40-pin QFN |
| Operating Temperature | -40 C to +85 C | — |
| RoHS Status | Compliant | Compliant (per distributor listings) |
| Pin Compatible With | CDK1307 family | — |
| Maximum Sample Rate | — | 20 MSPS |
| Family Sample Rate Options | — | 20 / 40 / 65 / 80 MSPS |
| Reference | — | Internal (no external reference required) |
| Digital Interface | — | CMOS, parallel |
| Control Interface | — | CMOS |
| Power-Down Pin (PD_N) | — | Yes (active low) |
| Sleep Pin (SLP_N) | — | Yes (active low) |
| Mounting Type | — | Surface Mount |
| Power Consumption | — | Ultra-low (per family datasheet, exact value [DATA_NEEDED: power consumption mW]) |
| Operating Temperature Range | — | [DATA_NEEDED: operating temperature range] |
| Supply Voltage | — | [DATA_NEEDED: AVDD / DRVDD values] |
| Manufacturer | — | MaxLinear (formerly Exar Corporation) |