EP1C12Q240I8ES vs EP1C12Q240C6N Comparison

Detailed side-by-side comparison of EP1C12Q240I8ES by Intel and EP1C12Q240C6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1C12Q240I8ES EP1C12Q240C6N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $7.15 $119.00
Manufacturer Intel —
Manufacturer Part Number EP1C12Q240I8ES —
FPGA Family Cyclone —
Programmable Logic Type FPGA (field-programmable gate array) —
Configuration Type SRAM-based SRAM-based, in-circuit programmable
FPGA Process 1.5-V, 0.13-um, all-layer copper SRAM process —
Maximum Family Logic Elements 20,060 LEs —
Maximum Family Embedded RAM 288 Kbits —
EP1C12 Delivered Logic Elements [DATA_NEEDED: EP1C12 exact LE count] —
Package Code FQFP —
Package Description 240-pin square QFP (PQFP/FQFP) —
Number of Terminals 240 —
Terminal Form GULL WING —
Package Shape Square —
JESD-609 Code e0 —
Maximum Supply Voltage 1.575 V —
Nominal Core Supply Voltage 1.5 V —
Speed Grade 8 —
Temperature Grade Code I (industrial) —
Ordering Code Variant ES (engineering sample) —
Minimum Operating Temperature [DATA_NEEDED: minimum operating temperature] —
Maximum Operating Temperature [DATA_NEEDED: maximum operating temperature] —
Supported Configuration Configuration and JTAG boundary-scan testing supported —
RoHS Status unknown —
Product Family — Cyclone FPGA (Intel/Altera)
Number of Logic Elements — 12060
Total RAM Bits — 239616
Number of M4K Blocks — 52
Number of User I/Os — 173
Maximum Internal Clock (speed grade -6) — 320.1 MHz
Core Supply Voltage — 1.5 V
I/O Supply Voltage Options — [DATA_NEEDED: supported I/O standards list]
Package — 240-pin PQFP/BFQFP (34.6 x 34.6 mm, 0.5 mm pitch)
Mounting Type — Surface Mount
Temperature Grade — Commercial (C suffix)
Process Technology — 130 nm
RoHS Lead-Free Finish — Yes (N suffix)
MSL Level — [DATA_NEEDED: MSL level]
JTAG Boundary Scan — Supported

Datasheets & Resources

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