EP1C20F324C6N vs EP1C20F324C6 Comparison

Detailed side-by-side comparison of EP1C20F324C6N by Altera and EP1C20F324C6 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1C20F324C6N EP1C20F324C6
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete NRND
Stock Status In Stock In Stock
Unit Price (USD) $21.75 $105.00
Series Cyclone® —
Family Cyclone I Cyclone
Logic Elements (LEs) 20,060 —
Logic Array Blocks (LABs) 2,006 —
Total RAM Bits 294,912 (36 Kbit) —
Embedded Multipliers (18×18) Yes (M4K + DSP blocks per datasheet) —
User I/Os 233 —
Number of CLBs / Logic Cells 20,060 cells (20060 CLBs per datasheet) —
Supply Voltage - Core 1.5 V —
Maximum Operating Frequency 405 MHz (per FindIC specification) —
Process Technology CMOS, 0.13 µm SRAM-based 130 nm CMOS
Package 324-FBGA (FineLine BGA), 19 × 19 mm, 1.0 mm pitch 324-ball FBGA (FineLine BGA)
Mounting Type Surface Mount (BGA) —
Speed Grade C6 6
Operating Temperature 0 °C to +85 °C (commercial, "C" prefix) —
Lead-Free / RoHS Yes (lead-free, "N" suffix per part number decoder) —
PLLs 2 (per Cyclone family datasheet) 4
Configuration JTAG, Passive Serial, Active Serial (EPCS) —
Logic Elements (LE) — 20,060
Embedded RAM Bits — 294,912 bits (64 M4K blocks × 4,608 bits)
User I/O Count — 233
Core Voltage (VCCINT) — 1.5 V
I/O Voltage Standards — LVCMOS / LVTTL (3.3 V, 2.5 V, 1.8 V, 1.5 V), LVDS
Maximum Internal Frequency — 405.2 MHz
LVDS Data Rate (per pair) — Up to 640 Mbps
Memory Interfaces — DDR SDRAM, QDR SRAM, SDR SDRAM
Temperature Grade — Commercial (0 °C to +85 °C)
Configuration Modes — Active Serial (AS), Passive Serial (PS), JTAG

Datasheets & Resources

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