EP1K10TC100-1N vs EP1K10TC100-3N Comparison

Detailed side-by-side comparison of EP1K10TC100-1N by Intel and EP1K10TC100-3N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1K10TC100-1N EP1K10TC100-3N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $9.20 $19.95
Family ACEX-1K ACEX 1K
Series EP1K10 ACEX-1K
Logic Elements / Cells 576 β€”
Total Gates (typical) 10,000 β€”
Embedded RAM Bits 12,288 bits β€”
Logic Array Blocks (LABs) 72 β€”
Embedded Array Blocks (EABs) 3 x 4 Kbit β€”
User I/Os 66 β€”
Core Supply Voltage 2.5 V (2.375 V to 2.625 V) β€”
Operating Temperature 0 Β°C to 70 Β°C (commercial) [DATA_NEEDED: operating temperature range]
Process Technology 0.22 Β΅m CMOS SRAM 0.22 Β΅m CMOS
Package 100-pin TQFP (14 mm x 14 mm, 1 mm height) 100-pin TQFP
Mounting Type Surface Mount (gull-wing) β€”
Speed Grade -1N (commercial, slower tier) -3 (commercial)
Configuration Method SRAM (external PROM required) β€”
JTAG Support Yes (IEEE 1149.1 boundary-scan) Yes (IEEE 1149.1-1990)
RoHS Status Compliant [DATA_NEEDED: RoHS compliance]
Manufacturer β€” Intel (formerly Altera)
Typical Gate Count β€” 10,000 gates
Logic Elements (Cells) β€” 576
Embedded Memory (EAB) β€” 12,288 bits
Number of LABs β€” 72
User I/O Count β€” 66
Operating Voltage (Core) β€” 2.5 V
Maximum Internal Clock Frequency β€” 200 MHz
PCI Compliance β€” PCI Local Bus Specification Revision 2.2 (5.0 V)
Configuration β€” JTAG / serial configuration device

Datasheets & Resources

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