EP1M350F780C8 vs EP1M350F780C7N Comparison
Detailed side-by-side comparison of EP1M350F780C8 by Altera and EP1M350F780C7N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP1M350F780C8
EP1M350F780C8 - Mercury PLD FPGA 350K Gates 780-BGA | Altera
EP1M350F780C8 ObsoleteIntel
EP1M350F780C7N
EP1M350F780C7N - 350K Gate Mercury FPGA 1.25Gbps CDR 780-FBGA
EP1M350F780C7N ObsoleteSpecification Comparison
| Parameter | EP1M350F780C8 | EP1M350F780C7N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $175.00 | $168.00 |
| Device Family | Altera APEX Mercury (EP1M) | β |
| Typical Gates | 350,000 | β |
| Maximum Logic Elements (LEs) | 12,160 | β |
| Embedded RAM Blocks | 4 dual-port RAM blocks | β |
| Package | 780-ball FineLine BGA | β |
| Speed Grade | C8 (commercial, speed bin 8) | C7 (-7 commercial) |
| Operating Temperature | 0C to +85C (commercial) | 0 C to 85 C (commercial) |
| Supply Voltage (Core) | [DATA_NEEDED: core Vcc] | β |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, SSTL, LVDS (up to 20 standards) | β |
| Global Clock Networks | 8 | β |
| Configuration Interface | IEEE 1532 / passive serial / JTAG | β |
| Maximum User I/O | [DATA_NEEDED: user I/O count] | β |
| In-System Programmability | Yes (ISP via JTAG) | β |
| RoHS Status | unknown (legacy device) | [DATA_NEEDED: RoHS compliance status] |
| Mounting Type | Surface Mount (BGA) | β |
| MSL Level | [DATA_NEEDED: MSL rating] | β |
| Family | β | Mercury (EP1M350) |
| Device Type | β | FPGA / Loadable PLD |
| Logic Cells | β | 14,400 |
| Gate Count | β | 350,000 |
| Core Supply Voltage | β | 1.8 V |
| User I/Os | β | 486 |
| Total Pins | β | 780 |
| Package Type | β | FC-FBGA / FINE LINE BGA-780 |
| Terminal Pitch | β | 1.0 mm |
| Logic Family | β | CMOS |
| Transceivers | β | Up to 18 channels, 1.25 Gbps CDR |
| Architecture | β | LUT-based, register-rich |