EP20K100CQ208C7 vs EP20K100CQ208C9 Comparison
Detailed side-by-side comparison of EP20K100CQ208C7 by Intel and EP20K100CQ208C9 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K100CQ208C7
EP20K100CQ208C7 - APEX20K FPGA 100K Gates 159 I/O 208QFP | Intel
EP20K100CQ208C7 ObsoleteIntel
EP20K100CQ208C9
EP20K100CQ208C9 - APEX 20K FPGA, 100K Gates, 4160 LE, 208-QFP
EP20K100CQ208C9 ObsoleteSpecification Comparison
| Parameter | EP20K100CQ208C7 | EP20K100CQ208C9 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $22.40 | $25.10 |
| Family | APEX20K | β |
| Logic Elements | 4,160 | β |
| Typical Gates | 100,000 | 100,000 |
| Maximum System Gates | 263,000 | β |
| Embedded RAM Bits | 53,248 | β |
| User I/O Pins | 159 | β |
| Package | 208-pin PQFP (QFP) | 208-pin PowerQuad QFP (PQFP-208) |
| Speed Grade | C7 (7 ns pin-to-pin delay) | C9 |
| Temperature Grade | Commercial (0C to +85C) | β |
| Core Voltage | 1.8 V | β |
| I/O Voltage | 3.3 V (LVTTL/LVCMOS/PCI compatible) | β |
| Process Technology | SRAM-based CMOS | 0.18 micron CMOS SRAM |
| Configuration Method | SRAM - volatile, requires boot PROM | β |
| Mounting Type | Surface Mount (PQFP with gull-wing leads) | Surface Mount |
| Lifecycle Status | Obsolete - last-time-buy phase ended | β |
| RoHS Status | [DATA_NEEDED: rohs status not in verified data] | [DATA_NEEDED: RoHS status] |
| MSL Level | [DATA_NEEDED: moisture sensitivity level] | β |
| Series | β | APEX 20K |
| Family Name | β | APEX 20K |
| Number of Logic Elements | β | 4,160 |
| Maximum User I/O | β | 159 |
| Total RAM Bits | β | 53,248 |
| Number of PLLs | β | 4 |
| Embedded System Blocks (ESBs) | β | 26 |
| Operating Temperature | β | 0 C to +70 C |
| Supply Voltage (Core) | β | 1.8 V typical |
| Configuration Interface | β | Passive Serial, JTAG (IEEE 1149.1) |
| Programming Method | β | SRAM-based, in-system programmable |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |