EP20K100EQC240-3N vs EP20K100EQC208-3N Comparison

Detailed side-by-side comparison of EP20K100EQC240-3N by Intel and EP20K100EQC208-3N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP20K100EQC208-3N EP20K100EQC208-3N FPGA - 1.8V APEX-20KE | Altera

EP20K100EQC208-3N FPGA - 1.8V APEX-20KE | Altera

EP20K100EQC208-3N Obsolete

Specification Comparison

Parameter EP20K100EQC240-3N EP20K100EQC208-3N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status NRND Obsolete
Device Type Field Programmable Gate Array (FPGA) —
Series APEX-20KE —
Logic Capacity 100K gates —
Logic Cells 4160 —
Total RAM 53248 bits —
User I/O 183 pins —
Operating Frequency 250 MHz —
Propagation Delay 1.6 ns 2.2 ns
Supply Voltage 1.71 V to 1.89 V; nominal 1.8 V —
Technology 0.22 um CMOS —
Package 240-BFQFP —
Package Type PQFP 208-BFQFP (PQFP-208)
Pin Count 240 pins —
Operating Temperature 0 C to 85 C —
Mounting Type Surface Mount Surface Mount
Macrocell Count 416 macros —
Configuration Category Loadable PLD —
Product Family — APEX-20KE
FPGA Type — Field Programmable Gate Array
Number of Logic Elements — 4160
Typical Gates — 100000
System Gates — 263000
Total RAM Bits — 53248
Number of User I/O — 151
Core Supply Voltage — 1.8 V
Maximum Clock Frequency — 250 MHz
Speed Grade — -3
Number of Pins — 208
Operating Temperature Range — 0 °C to +85 °C
Process Technology — [DATA_NEEDED: Process technology]
I/O Standards Supported — [DATA_NEEDED: Supported I/O standards]
Package Body Dimensions — [DATA_NEEDED: Package body dimensions]
Terminal Pitch — [DATA_NEEDED: Terminal pitch]
MSL Level — [DATA_NEEDED: MSL level]

Datasheets & Resources

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