EP20K200BC356-1 vs EP20K200BC356-2 Comparison
Detailed side-by-side comparison of EP20K200BC356-1 by Altera and EP20K200BC356-2 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K200BC356-1 | EP20K200BC356-2 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Product Function | APEX-20K Field Programmable Gate Array (FPGA) | — |
| Logic Family | CMOS | CMOS |
| Equivalent System Gates | 200K gates | — |
| Logic Elements / Cells | 8320 | — |
| Total RAM Bits | 106496 bits | — |
| Maximum Clock Frequency | 250 MHz | — |
| Core Supply Voltage | 2.5 V | 2.5 V |
| User I/O Count | 277 | — |
| Number of Pins | 356 | — |
| Package / Case | 356-LBGA | — |
| Package Code | LBGA | — |
| Package Shape | Square | — |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Process Technology | 0.22 um | 0.22 µm |
| Propagation Delay (tPD) | 2.5 ns (from -1N variant listing) | — |
| Operating Temperature Range | 0 to 85 C (commercial, per -1N variant listing) | — |
| RoHS Status | [DATA_NEEDED: RoHS/lead finish of original non-N EP20K200BC356-1] | [DATA_NEEDED: RoHS compliance] |
| Lead-Free Finish | [DATA_NEEDED: original non-N finish not specified; N suffix indicates lead-free] | — |
| Series | — | APEX-20K |
| Device Family | — | APEX-20K (MultiCore PLD) |
| Logic Elements | — | 8,320 |
| Typical Gate Count | — | 200,000 gates |
| Embedded Memory | — | 106,496 bits |
| User I/Os | — | 277 |
| Propagation Delay | — | 2.5 ns |
| Operating Temperature | — | 0 °C to +85 °C (commercial) |
| Package | — | 356-LBGA (35 mm × 35 mm) |
| Speed Grade | — | -2 |
| Maximum Frequency | — | 200 MHz |