EP20K200CB356C7N vs EP20K200BC356-3 Comparison
Detailed side-by-side comparison of EP20K200CB356C7N by Intel and EP20K200BC356-3 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K200CB356C7N - APEX 20KC FPGA 200K Gates 356-BGA | Intel / Altera
EP20K200CB356C7N Obsolete
Specification Comparison
| Parameter | EP20K200CB356C7N | EP20K200BC356-3 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20K (MultiCore) |
| Series | EP20K200 | APEX-20K |
| System Gates | 200,000 | — |
| Logic Elements / Cells | 8,320 | 8320 |
| Maximum Operating Frequency | 3571.6 MHz (internal equivalent) | — |
| Propagation Delay | 1.48 ns | 2.5 ns |
| User I/Os | 263 | 277 |
| Input Terminals | 267 | — |
| Supply Voltage (Nominal) | 1.8 V | — |
| Process Technology | 0.15 um CMOS | — |
| Operating Temperature | 0C to +85C (Commercial) | 0 °C to +85 °C (Commercial) |
| Package | 356-ball PBGA (S-PBGA) | 356-LBGA |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Embedded Memory | ESBs (dual-port RAM/ROM/FIFO) | — |
| Clock Management | PLL with up to 4 outputs | — |
| JTAG Support | Yes (IEEE 1149.1) | — |
| In-System Programmable | Yes | — |
| RoHS Status | unknown | unknown |
| Embedded Memory Bits | — | 106496 |
| Number of Macrocells | — | 832 |
| Total Package Pins | — | 356 |
| Supply Voltage (Core) | — | 2.5 V |
| Technology | — | 0.22 µm CMOS |
| Maximum Internal Frequency | — | 167 MHz |
| Logic Family | — | CMOS |
| Configuration Interface | — | IEEE 1149.1 JTAG |