EP20K200CB356C8N vs EP20K200EBC356-1 Comparison

Detailed side-by-side comparison of EP20K200CB356C8N by Altera and EP20K200EBC356-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K200CB356C8N EP20K200EBC356-1
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Family APEX 20KC APEX 20K (APEX 20KE)
Series EP20K200 —
Device Type SRAM-based LUT FPGA —
System Gates 200,000 200,000
Logic Elements (Cells) 8,320 —
Maximum Internal Frequency 301.21 MHz —
Process Technology 0.15 um CMOS 0.22 µm CMOS
Propagation Delay (tpd) 1.78 ns —
Nominal Core Supply Voltage 1.8 V —
Core Supply Voltage Range 1.71 V to 1.89 V —
Number of User I/O Pins 263 —
Number of Dedicated Inputs 4 —
Total Macrocells / Output Functions 263 —
Embedded Memory Bits 106,496 bits —
Number of PLLs 4 —
MultiVolt I/O Support 1.5 V / 1.8 V / 2.5 V / 3.3 V —
Differential Signaling LVDS —
Configuration Interface Serial / JTAG (IEEE 1149.1) —
Package 356-ball LBGA 356-ball LBGA (35 x 35 mm)
Operating Temperature (commercial "C") 0 C to +85 C (TJ) —
Terminal Finish ("N") Lead-free / Pb-free —
RoHS Status [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status not stated in verified sources]
Moisture Sensitivity Level (MSL) [DATA_NEEDED: MSL rating] —
Logic Elements / Cells — 8,320
Maximum User I/Os — 277
Core Voltage — 1.8 V (1.71 V to 1.89 V)
Propagation Delay — 2.5 ns
Internal Performance — Up to 367 MHz
Mounting Type — Surface Mount (BGA)
Operating Temperature — 0 °C to 85 °C (Commercial)
Architecture — MultiCore (LUT + product-term + embedded memory)
On-chip Memory — Embedded System Blocks (ESB / SRAM)
Configuration Method — JTAG (ByteBlaster / MasterBlaster), passive serial
Development Software — Altera Quartus II
Lifecycle Status — Obsolete / EOL

Datasheets & Resources

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