EP20K200CF484C9N vs EP20K200CF484I9N Comparison

Detailed side-by-side comparison of EP20K200CF484C9N by Altera and EP20K200CF484I9N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K200CF484C9N EP20K200CF484I9N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete NRND
Stock Status In Stock In Stock
Unit Price (USD) $201.04 $115.00
Family APEX 20KC APEX 20KC
Device Type FPGA (Field-Programmable Gate Array) —
Typical Gates 200,000 —
Logic Elements 8,320 —
Embedded System Block (ESB) Bits 106,496 —
Maximum User I/O 376 —
Maximum Clock Frequency 250 MHz —
Process Technology 0.15 um CMOS 0.15 µm CMOS
Core Supply Voltage (VCCINT) 1.8 V —
I/O Supply Voltage (VCCIO) 3.3 V / 2.5 V / 1.8 V / 1.5 V (MultiVolt) —
Package 484-pin FineLine BGA (FBGA) 484-pin FBGA (PBGA484), 1.0 mm pitch
Speed Grade C9 (250 MHz) I9 (industrial, highest-performance bin)
Temperature Grade Industrial (0C to +85C) —
Mounting Type Surface Mount (BGA) —
Configuration Scheme SRAM-based, supports passive serial/parallel and JTAG —
MSL Level 3 (per JEDEC J-STD-020) —
RoHS Status Compliant Compliant
Logic Elements / Cells — 8,320
Maximum Gates — 200,000
Maximum Internal Frequency — 250 MHz
Core Supply Voltage — 1.8 V nominal (1.71 V to 1.89 V)
User I/O Count — 376 (368 user I/O + 4 dedicated inputs)
Operating Temperature — [DATA_NEEDED: industrial temperature range -40C to +85C assumed for I-grade]
Programmable I/O Standards — LVTTL, LVCMOS, PCI
Configuration Interface — JTAG IEEE 1149.1, ByteBlaster/BitBlaster serial
On-chip Memory — Embedded System Blocks (ESBs) for distributed RAM/ROM
Lead-Free (Pb-free) — Yes (N suffix)

Datasheets & Resources

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