EP20K200CQ240C7ES vs EP20K200CQ240C8ES Comparison
Detailed side-by-side comparison of EP20K200CQ240C7ES by Intel and EP20K200CQ240C8ES by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K200CQ240C8ES - 200K APEX 20KC FPGA, 240-PQFP | Altera (Intel PSG)
EP20K200CQ240C8ES ObsoleteSpecification Comparison
| Parameter | EP20K200CQ240C7ES | EP20K200CQ240C8ES |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.95 | $95.00 |
| FPGA Family | APEX 20KC | β |
| Total Gates | 200,000 system gates | β |
| Number of Logic Elements | 8,320 | β |
| Total RAM Bits | 106,496 bits | β |
| Number of User I/O | 168 | β |
| Maximum Internal Frequency | 375.94 MHz | β |
| Core Supply Voltage | 1.8 V | β |
| Process Technology | 0.15 um CMOS | 0.15 Β΅m CMOS |
| Package Type | 240-Pin PQFP (BFQFP) | β |
| Pin Count | 240 | β |
| Mounting Type | Surface Mount | Surface Mount |
| Speed Grade | C7 (commercial speed grade, per C7 suffix) | C8 |
| Temperature Grade | [DATA_NEEDED: Operating Temperature Range] | β |
| I/O Supply Voltage Range | [DATA_NEEDED: I/O Supply Voltage Range] | β |
| Configuration Type | SRAM-based; external configuration device required | β |
| Product Status | Obsolete legacy APEX 20KC family | β |
| RoHS Status | unknown | [DATA_NEEDED: RoHS compliance] |
| MSL Level | [DATA_NEEDED: MSL Level] | [DATA_NEEDED: MSL rating] |
| Family | β | APEX 20KC |
| Device Logic Elements | β | 8,320 cells |
| Typical Gates | β | 200,000 |
| Embedded Memory | β | 106,496 bits |
| User I/O Count | β | 168 |
| Maximum Internal Clock Frequency | β | 301.21 MHz |
| Core Voltage | β | 1.8 V |
| Package | β | 240-BFQFP (PQFP) |
| Number of Pins | β | 240 |
| Operating Temperature | β | [DATA_NEEDED: Operating temperature range] |
| Device Variant Suffix | β | ES (engineering sample) |
| PLLs | β | 4 |