EP20K200EFC484-2N vs EP20K200EFC484-1 Comparison

Detailed side-by-side comparison of EP20K200EFC484-2N by Intel and EP20K200EFC484-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP20K200EFC484-1 EP20K200EFC484-1 - APEX 20KE FPGA 200K Gates 484-BGA | Altera

EP20K200EFC484-1 - APEX 20KE FPGA 200K Gates 484-BGA | Altera

EP20K200EFC484-1 ⚠ Last Time Buy

Specification Comparison

Parameter EP20K200EFC484-2N EP20K200EFC484-1
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last Time Buy
Family APEX-20KE APEX 20KE
Product Type FPGA - Field Programmable Gate Array —
System Gates 200,000 200000
Logic Elements 8,320 —
Total RAM Bits 106,496 —
Embedded System Blocks (ESB) 52 (True Dual-Port RAM) —
Maximum User I/O 376 376
Package 484-FBGA (FineLine BGA), 23x23 mm, 1.0 mm pitch 484-BGA (FineLine BGA)
Core Voltage 1.8 V 1.8 V
Supply Voltage Range 1.71 V to 1.89 V —
Process Technology 0.22 µm CMOS 0.22 µm CMOS
Logic Family CMOS —
Propagation Delay (typ.) 2.5 ns —
Operating Temperature 0 °C to +85 °C (Commercial) -40 °C to +85 °C (industrial, inferred from grade code)
Configuration Modes Passive Serial, Passive Parallel Async, JTAG —
PLLs 4 —
Speed Grade -2 —
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Mounting Type Surface Mount (BGA) Surface Mount
Lead-Free [DATA_NEEDED: lead-free status] —
Logic Elements / Cells — 8320
Embedded Memory (Bits) — 106496
Number of PLLs — 4
Package Ball Count — 484
I/O Standard Support — LVDS, PCI, LVTTL, LVCMOS, SSTL, HSTL
Programming Interface — IEEE 1149.1 JTAG, passive serial, passive parallel
MSL Level — [DATA_NEEDED: MSL moisture sensitivity level]

Datasheets & Resources

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