EP20K200EQC240-3N vs EP20K200EQC240-2N Comparison
Detailed side-by-side comparison of EP20K200EQC240-3N by Altera and EP20K200EQC240-2N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K200EQC240-2N - 200K Gate APEX-20KE FPGA, 240-PQFP | Intel / Altera
EP20K200EQC240-2N NrndSpecification Comparison
| Parameter | EP20K200EQC240-3N | EP20K200EQC240-2N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $45.25 | $198.75 |
| Series | APEX-20KE | — |
| Number of Logic Elements/Cells | 8320 | — |
| Number of Gates | 200000 | — |
| Total RAM Bits | 106496 bits | — |
| Number of User I/Os | 168 | — |
| Voltage - Supply | 1.71V ~ 1.89V | — |
| Core Supply Voltage | 1.8 V nominal | 1.8 V |
| Maximum Internal Frequency | 189 MHz common -3 speed listing | — |
| Speed Grade | -3 | -2 (mid-speed) |
| Operating Temperature | 0 to 85 C | 0 °C to +85 °C (commercial) |
| Package / Case | 240-BQFP | — |
| Supplier Device Package | 240-PQFP (32x32) | — |
| Mounting Type | Surface Mount | Surface Mount |
| Technology | CMOS | — |
| Process Technology | 0.22 um | 0.22 µm CMOS |
| Configuration Type | SRAM-based, external configuration required | — |
| Lifecycle Status | Obsolete / legacy distribution via Rochester Electronics | — |
| I/O Standards Supported | [DATA_NEEDED: I/O standards from APEX-20KE datasheet] | 1.8 V / 2.5 V / 3.3 V / 5 V (MultiVolt) |
| Configuration Bitstream Size | [DATA_NEEDED: exact configuration file size for EP20K200E] | — |
| Thermal Resistance (theta_JA) | [DATA_NEEDED: thermal resistance for 240-BQFP] | — |
| RoHS Status | Unknown; N suffix often indicates Pb-free finish but not confirmed in verified snippets | Compliant (Pb-free BQFP) |
| Family | — | APEX-20KE |
| Logic Elements (LEs) | — | 8,320 |
| Equivalent Gates | — | 200,000 |
| Embedded System Block (ESB) Memory | — | 106,496 bits |
| Macrocells | — | 832 |
| Maximum User I/O | — | 168 |
| Propagation Delay | — | 2.5 ns |
| PLLs | — | 4 |
| Package | — | 240-pin PQFP (BQFP, gull-wing) |
| Configuration Interface | — | IEEE 1149.1 JTAG (in-system programmable) |