EP20K200RC208-3N vs EP20K200RC208-2 Comparison

Detailed side-by-side comparison of EP20K200RC208-3N by Altera and EP20K200RC208-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K200RC208-3N EP20K200RC208-2
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete NRND
Family APEX-20K APEX-20K MultiCore FPGA
Series APEX 20K APEX-20K
Logic Elements 8320 cells —
System Gates 200,000 200,000 (typical)
Embedded Memory 106,496 bits —
Maximum Operating Frequency 167 MHz —
User I/O Pins 144 —
Dedicated Inputs 4 —
Process Technology 0.22 um CMOS [DATA_NEEDED: process node]
Core Supply Voltage 2.5 V —
I/O Standard Support LVDS, 1.8V APEX-20KE family —
Package Type 208-RQFP / BFQFP with exposed pad —
Terminal Pitch 0.5 mm —
Operating Temperature Range 0C to +85C (industrial) —
Propagation Delay 3.6 ns —
Architecture MultiCore (LUT + product-term + embedded memory) —
Mounting Type Surface Mount Surface Mount
Logic Elements (LEs) — 8320
Embedded Memory (bits) — 106,496
Maximum User I/O — 144
Package — 208-BQFP / 208-RQFP with Exposed Pad
Pin Count — 208
Speed Grade — -2 (mid-speed, industrial)
Operating Temperature — -40C to +85C (industrial)
Supply Voltage (Core) — [DATA_NEEDED: core VCC]
Supply Voltage (I/O) — 3.3 V (multi-standard I/O)
Configuration Interface — JTAG (IEEE 1149.1) + Altera legacy scheme
MSL Level — [DATA_NEEDED: MSL rating]
RoHS Status — [DATA_NEEDED: RoHS compliance]
Lead-Free — [DATA_NEEDED: lead-free status]

Datasheets & Resources

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