EP20K30EQC208-3 vs EP20K30EQC208-2 Comparison

Detailed side-by-side comparison of EP20K30EQC208-3 by Altera and EP20K30EQC208-2 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K30EQC208-3 EP20K30EQC208-2
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $62.00 $7.92
Series APEX-20KE β€”
Core Voltage Supply 1.71 V to 1.89 V β€”
Total Logic Elements 1200 β€”
Total Gates 30000 β€”
Total RAM Bits 24576 β€”
User I/O Count 125 β€”
Number of LABs/CLBs 120 β€”
Operating Frequency (Max) 435 MHz β€”
Technology Process 0.22 Β΅m CMOS β€”
Speed Grade -3 -2 (2.69 ns pin-to-pin)
Package 208-BFQFP (PQFP, 28x28 mm) 208-BFQFP (PQFP-208)
Mounting Type Surface Mount Surface Mount (PQFP with gull-wing leads)
Number of Pins 208 β€”
Operating Temperature -40C to +85C [DATA_NEEDED: operating temperature range]
Programming Interface JTAG (IEEE 1149.1) β€”
RoHS Status Compliant (per Rochester listing) [DATA_NEEDED: RoHS compliance status]
Family β€” APEX 20KE
Device Logic β€” FPGA (SRAM-based)
Typical Gates β€” 30,000
Logic Elements β€” 1,200
Embedded Memory (RAM bits) β€” 24,576
Maximum User I/O β€” 125
Dedicated Inputs β€” 4
Core Supply Voltage β€” 1.71 V to 1.89 V
I/O Standard β€” LVDS-compatible, 1.8 V / 2.5 V / 3.3 V (per bank)
Maximum Clock Frequency β€” 160 MHz
Propagation Delay β€” 2.69 ns
Configuration Interface β€” IEEE 1149.1 JTAG, Passive serial, Active serial
Process Technology β€” 1.8 V CMOS, MultiCore architecture
MSL Level β€” [DATA_NEEDED: MSL rating]

Datasheets & Resources

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