EP20K400CF672C7ES vs EP20K400CF672C-7 Comparison

Detailed side-by-side comparison of EP20K400CF672C7ES by Altera and EP20K400CF672C-7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400CF672C7ES EP20K400CF672C-7
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Family APEX 20KC APEX-20KC
Series EP20K400 —
Device Type Loadable PLD / FPGA —
Logic Elements (Cells) 16,640 —
System Gates 400,000 —
Embedded Memory (Bits) 212,992 —
Total RAM Bits 212,992 —
Maximum User I/O 488 488
I/O Lines 484 —
Input Lines 488 —
Number of PLLs 4 4
Maximum Internal Clock Frequency 375.94 MHz —
Propagation Delay 1.4 ns —
Process Technology 0.18 um CMOS 0.15 µm CMOS, SRAM-based
Core Voltage 1.8 V —
MultiVolt I/O 1.5 V / 1.8 V / 2.5 V / 3.3 V —
Speed Grade C7 (commercial, -7) -7 (commercial)
Operating Temperature 0C to +85C (commercial) 0 °C to +85 °C (commercial)
Package Type 672-ball FineLine BGA —
Package Code FC-FBGA-B672 —
Ball Pitch 1.000 mm —
Mounting Type Surface Mount Surface Mount (SMD/SMT)
RoHS Status [DATA_NEEDED: RoHS compliance] —
Logic Elements (LE) — 16640
Embedded Memory Bits — 212992
Number of Logic Array Blocks (LABs) — 1664
Number of ESBs (Embedded System Blocks) — 212
Number of CAM Blocks — 16
Core Voltage (VCCINT) — 1.8 V
I/O Voltage (VCCIO) — 1.8 V / 2.5 V / 3.3 V (MultiVolt)
Package — 672-pin FC-FBGA (FineLine BGA)
MSL Level — [DATA_NEEDED: MSL level]
Lead-Free / RoHS — [DATA_NEEDED: lead-free / RoHS status]
PCI Support — PCI 2.2 compliant, 64-bit / 66 MHz
Configuration Modes — PS, PPA, PPS, JTAG
External Memory Support — DDR SDRAM, ZBT SRAM

Datasheets & Resources

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