EP20K400FC672-3 vs EP20K400CFC672-9 Comparison
Detailed side-by-side comparison of EP20K400FC672-3 by Altera and EP20K400CFC672-9 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K400FC672-3 | EP20K400CFC672-9 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Family | APEX 20K | APEX-20KC |
| Device Logic Elements | 16,640 cells | — |
| Typical Gate Count | 400,000 system gates | 400,000 gates |
| Maximum User I/Os | 502 | — |
| Propagation Delay | 2.5 ns | — |
| Internal Performance | 167 MHz | — |
| Process Technology | 0.22 µm CMOS | — |
| Core Supply Voltage | 2.5 V | 1.71 V to 1.89 V |
| Logic Family | CMOS, SRAM-based | — |
| Package | 672-pin FC-FBGA | 672-ball FineLine BGA (FCBGA) |
| Package Code | BGA | — |
| Number of Terminals | 672 | — |
| Terminal Form | Ball (BGA) | — |
| Speed Grade | -3 (commercial fastest) | -9 (commercial, slowest bin) |
| Operating Temperature | 0 °C to 85 °C | — |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Architecture | MultiCore (LUT + Embedded System Blocks) | — |
| Programming Method | SRAM, JTAG (ByteBlaster) | — |
| Lifecycle Status | Obsolete / Legacy | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Logic Elements / Macrocells | — | 1664 |
| Embedded Memory (ESB) | — | 212,992 bits |
| User I/O Count | — | 488 |
| PLLs | — | 4 |
| I/O Supply Voltage | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Operating Temperature (TJ) | — | 0 °C to 85 °C |
| Package Body Size | — | 27 mm × 27 mm |
| Configuration Method | — | EPC serial device or JTAG |
| Process Node | — | [DATA_NEEDED: process node] |