EP20K400GC655-2X vs EP20K400GI655-1X Comparison

Detailed side-by-side comparison of EP20K400GC655-2X by Altera and EP20K400GI655-1X by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400GC655-2X EP20K400GI655-1X
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Family APEX 20K APEX 20K
Series APEX-20KC® —
Logic Elements / Cells 16640 —
System Gates 400000 —
Total RAM Bits 212992 —
Number of I/O 496 —
Number of Dedicated Inputs 6 —
Number of LABs/CLBs [DATA_NEEDED: number of Logic Array Blocks] —
Number of EABs [DATA_NEEDED: number of Embedded Array Blocks] —
Maximum Operating Frequency 200 MHz —
Process Technology 0.22 µm CMOS CMOS, SRAM-based configuration
Core Supply Voltage 2.5 V —
I/O Supply Voltage (MultiVolt) 2.5 V / 3.3 V / 5 V —
Package Type 655-BCPGA (SPGA655) Ceramic Pin Grid Array (CPGA)
Package Body Material CERAMIC, metal-sealed cofired grid array CERAMIC (metal-sealed co-fired)
Package Dimensions 47 x 47 mm —
Peak Reflow Temperature 220 °C 220 C
Mounting Type Through-hole (CPGA) Through-Hole (PGA)
Programmability In-system, JTAG (IEEE 1149.1) —
Operating Temperature [DATA_NEEDED: temperature grade] -40 C to +85 C (industrial)
RoHS Status unknown Compliant
Device — EP20K400
Logic Elements — 16640
Number of Terminals — 655
User I/O Lines — 502
Dedicated Inputs — 4
Package Code (JESD-30) — S-CPGA-P655
Package Equivalence Code — SPGA655,47X47
Speed Grade — -1
Propagation Delay — 2.5 ns (typical for -1 grade)
Moisture Sensitivity Level (MSL) — 1

Datasheets & Resources

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