EP20K400GI655-1V vs EP20K400GI655-2V Comparison
Detailed side-by-side comparison of EP20K400GI655-1V by Intel and EP20K400GI655-2V by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K400GI655-1V - APEX 20K 400K Gate FPGA, 655-pin CBGA | Intel
EP20K400GI655-1V β Last Time Buy
Specification Comparison
| Parameter | EP20K400GI655-1V | EP20K400GI655-2V |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $155.00 | $199.50 |
| Family | APEX 20K | APEX 20K |
| Typical Gates | 400,000 | β |
| Logic Elements | 16,640 | 16,640 |
| Maximum User I/O | 502 | β |
| Dedicated Inputs | 4 | 6 |
| Package Type | CBGA-655 (Ceramic Ball Grid Array) | β |
| Package Code (JESD-30) | S-CPGA-P655 | β |
| Package Equivalence Code | SPGA655, 47x47 | SPGA655,47X47 |
| Process Technology | CMOS | 0.18 Β΅m CMOS |
| Propagation Delay | 2.5 ns | 3.0 ns to 3.1 ns |
| Core Supply Voltage | 2.5 V | 2.5 V (2.375 V to 2.625 V) |
| I/O Supply Voltage | 2.5 V / 3.3 V | 3.3 V |
| Configuration | In-system programmable via JTAG | β |
| Boundary Scan | IEEE 1149.1 JTAG | β |
| Operating Temperature | [DATA_NEEDED: industrial vs military grade] | Industrial (per -2V speed grade) |
| MSL Level | 1 | β |
| Package Body Material | Ceramic | Ceramic |
| RoHS Status | [DATA_NEEDED] | Non-compliant (ceramic SPGA, contains lead) |
| Maximum Gates | β | 400,000 |
| Embedded RAM Bits | β | 212,992 |
| User I/O Pins | β | 496 |
| Package | β | SPGA-655 (ceramic, 47 x 47 mm) |
| Moisture Sensitivity Level (MSL) | β | 1 |