EP20K400GI655-1X vs EP20K400GC655-1V Comparison

Detailed side-by-side comparison of EP20K400GI655-1X by Altera and EP20K400GC655-1V by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400GI655-1X EP20K400GC655-1V
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Family APEX 20K APEX 20KE
Device EP20K400 —
Logic Elements 16640 16,640
Number of Terminals 655 —
User I/O Lines 502 —
Dedicated Inputs 4 6
Package Type Ceramic Pin Grid Array (CPGA) —
Package Code (JESD-30) S-CPGA-P655 —
Package Equivalence Code SPGA655,47X47 —
Package Body Material CERAMIC (metal-sealed co-fired) —
Speed Grade -1 —
Propagation Delay 2.5 ns (typical for -1 grade) 2.5 ns
Process Technology CMOS, SRAM-based configuration 0.22 µm CMOS
Moisture Sensitivity Level (MSL) 1 —
Peak Reflow Temperature 220 C 220 °C
Operating Temperature -40 C to +85 C (industrial) —
Mounting Type Through-Hole (PGA) —
RoHS Status Compliant —
Typical Gate Count — 400,000 gates
Embedded Memory — 212,992 bits
Maximum User I/O — 496
Package — CBGA-655 (Ceramic Ball Grid Array)
Total Terminals — 655
Supply Voltage (Core) — 2.375 V to 2.625 V (nominal 2.5 V)
Maximum Internal Frequency — 250 MHz (-1V speed grade)
LVDS Support — Yes
Moisture Sensitivity Level — MSL 1
Qualification — Not Qualified
Programming Interface — IEEE 1532 / JTAG

Datasheets & Resources

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