EP20K600CB652C9N vs EP20K600CB652C9 Comparison

Detailed side-by-side comparison of EP20K600CB652C9N by Intel and EP20K600CB652C9 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CB652C9N EP20K600CB652C9
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $128.00 $142.50
Family APEX 20KC APEX 20KC
Device Type Loadable PLD (FPGA) β€”
Typical Gates 600,000 β€”
Logic Elements 24,320 β€”
Maximum User I/O 488 β€”
Package BGA-652 (652-ball FineLine BGA, 45 x 45 mm, 1.27 mm pitch) 652-BGA (45 Γ— 45 mm, 1.27 mm pitch)
Process Technology 0.15 micron all-layer copper CMOS 0.15 Β΅m all-layer copper CMOS
Core Supply Voltage 1.8 V β€”
Speed Grade C9 (~1.48 ns propagation delay) β€”
Architecture MultiCore LUT + embedded system memory (ESB) β€”
On-chip Memory Embedded system memory blocks (dual-port RAM, FIFO) β€”
Configuration Interface JTAG (IEEE 1149.1) and serial/PROM configuration β€”
Operating Temperature 0 C to 85 C (commercial) 0 Β°C to 85 Β°C (commercial)
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
Pin/Pin Compatibility Pin-compatible with APEX 20KE devices of same package β€”
Toolchain Altera/Intel Quartus II (legacy APEX support) β€”
RoHS Status [DATA_NEEDED: rohs status] Compliant (per Altera product page)
MSL Level [DATA_NEEDED: MSL level] β€”
Logic Elements / Cells β€” 24,320
Number of LABs / CLBs β€” 2,432
System Gates β€” 1,537,000
Total RAM Bits β€” 311,296
User I/O β€” 488
Number of I/O Banks β€” [DATA_NEEDED: I/O bank count]
Supply Voltage β€” 1.71 V to 1.89 V
Internal Datapath Frequency β€” up to 250 MHz
Propagation Delay (typ.) β€” 1.48 ns
Configuration β€” JTAG IEEE 1149.1 / serial / EPC2-compatible
Product Status β€” Obsolete (per distributor listings)

Datasheets & Resources

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