EP20K600CF33C7 vs EP20K600CF1020I9 Comparison

Detailed side-by-side comparison of EP20K600CF33C7 by Altera and EP20K600CF1020I9 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CF33C7 EP20K600CF1020I9
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last Time Buy
Series APEX-20K EP20K600
Family APEX-20K Field Programmable Gate Array APEX 20KC
Typical Gate Count 600,000 gates —
Logic Elements 24,320 —
Embedded RAM Bits 311,296 bits —
Embedded Array Blocks (EABs) [DATA_NEEDED: EAB count] —
Maximum User I/O Pins [DATA_NEEDED: max user I/O] —
Core Supply Voltage (VCCINT) 1.71 V to 1.89 V 1.71 V to 1.89 V
I/O Supply Voltage (VCCIO) [DATA_NEEDED: VCCIO range] —
Operating Temperature Range -40C to +85C (Industrial) —
Package 1020-BBGA / FCBGA (33x33 mm) 1020-ball FC-FBGA
Package Code BGA, 1020 balls —
Speed Grade C7 (7 ns) I9 (-9 speed grade, industrial)
Terminal Form Ball —
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: rohs status]
Mounting Type Surface Mount —
MSL Level [DATA_NEEDED: MSL level] —
Configuration Memory SRAM (volatile, requires external config device) —
Function — Loadable PLD / FPGA
Technology — CMOS, 0.15 µm process
System Gates — 600,000
Logic Elements / Cells — 24,320
Maximum Operating Frequency — 250 MHz
I/O Count — 588 user I/O
Dedicated Inputs — 580
Terminal Pitch — 1.00 mm
Ball Array — 32 x 32
Operating Temperature — -40 °C to +100 °C (Industrial)
PCI SIG Compliance — PCI Local Bus Specification Revision 2.2 (32/64-bit, 33/66 MHz, 3.3 V)
External Memory Support — DDR SDRAM, ZBT SRAM

Datasheets & Resources

Browse All Products Create BOM Request Quote