EP20K600CF672-1X vs EP20K600CF672C7N Comparison

Detailed side-by-side comparison of EP20K600CF672-1X by Intel and EP20K600CF672C7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CF672-1X EP20K600CF672C7N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status NRND Obsolete
Series APEX 20KC —
Device Family APEX 20KC MultiCore FPGA APEX 20KC
Maximum Typical Gates 600,000 —
Logic Elements 31,104 (per Altera APEX 20KC datasheet family) —
Embedded System Blocks (ESBs) up to 256 —
Embedded Memory (max bits) [DATA_NEEDED: ESB RAM bits] —
PLLs 4 —
Maximum User I/O [DATA_NEEDED: max user I/O count] —
Package 672-ball BGA (CF672), 1.27 mm pitch FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch
Speed Grade -1 (industrial speed grade, X = lead-free) C7
Process Technology 0.18 um SRAM CMOS 0.15 µm all-layer copper-metal CMOS
Configuration Method SRAM, JTAG (IEEE 1149.1), EPC passive serial —
Supply Voltage [DATA_NEEDED: VCCINT/VCCIO] —
Operating Temperature [DATA_NEEDED: industrial temp range] 0 °C to +85 °C (Commercial)
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
MSL Level [DATA_NEEDED: MSL rating] —
RoHS Status Compliant (per Alibaba distributor listing: "RoHS Compliant") unknown
Maximum System Gates — 1,052,000
Typical Gates — 600,000
Logic Elements / Cells — 24,320
Maximum User I/O Pins — 488
Total Package Pins — 652
Core Voltage — 1.8 V
Maximum Operating Frequency — 375.94 MHz
Propagation Delay — 1.48 ns
Architecture — MultiCore (LUT + Embedded System Memory)
Seated Height — 3.50 mm

Datasheets & Resources

Browse All Products Create BOM Request Quote