EP20K600CF672-2 vs EP20K600CF672-1X Comparison
Detailed side-by-side comparison of EP20K600CF672-2 by Intel and EP20K600CF672-1X by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K600CF672-2 | EP20K600CF672-1X |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $680.00 | $95.00 |
| Manufacturer | Intel / Altera | β |
| Series | APEX 20KC | APEX 20KC |
| Device Family | APEX 20KC PLD | APEX 20KC MultiCore FPGA |
| Gate Count (typical) | 600,000 gates | β |
| Logic Elements | 30,720 | 31,104 (per Altera APEX 20KC datasheet family) |
| Embedded RAM (approx.) | 311,232 bits | β |
| Process Technology | 0.18 um CMOS | 0.18 um SRAM CMOS |
| Speed Grade | -2 | -1 (industrial speed grade, X = lead-free) |
| Package Type | 672-ball FineLine BGA (FCBGA) | β |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Operating Temperature | 0 C to +60 C (TJ, per Alibaba supplier listing) | [DATA_NEEDED: industrial temp range] |
| Configuration Mode | Enhanced Configuration (EPC) | β |
| Number of PLLs | 4 | β |
| I/O Standards | LVTTL, LVCMOS, and others per datasheet | β |
| Boundary Scan | IEEE 1149.1 (JTAG) | β |
| RoHS Status | [DATA_NEEDED: rohs_status] | Compliant (per Alibaba distributor listing: "RoHS Compliant") |
| Lifecycle Status | Obsolete / last-time-buy | β |
| Maximum Typical Gates | β | 600,000 |
| Embedded System Blocks (ESBs) | β | up to 256 |
| Embedded Memory (max bits) | β | [DATA_NEEDED: ESB RAM bits] |
| PLLs | β | 4 |
| Maximum User I/O | β | [DATA_NEEDED: max user I/O count] |
| Package | β | 672-ball BGA (CF672), 1.27 mm pitch |
| Configuration Method | β | SRAM, JTAG (IEEE 1149.1), EPC passive serial |
| Supply Voltage | β | [DATA_NEEDED: VCCINT/VCCIO] |
| MSL Level | β | [DATA_NEEDED: MSL rating] |