EP20K600CF672C8 vs EP20K600CF672C8N Comparison
Detailed side-by-side comparison of EP20K600CF672C8 by Intel and EP20K600CF672C8N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K600CF672C8 | EP20K600CF672C8N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Unknown | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $322.41 | $108.00 |
| Device Type | Field Programmable Gate Array (FPGA) | SPLD |
| Product Family | APEX-20K | β |
| User I/O Count | 508 | 508 |
| Logic Elements | 24,320 | β |
| Total RAM Bits | 311,296 bits | β |
| Propagation Delay | 1.48 ns | 1.48 ns |
| Package Pin Count | 672 balls | β |
| Supplier Device Package | 672-FBGA, 27 mm x 27 mm | β |
| Alternate Package Description | BGA-652, 45 mm x 45 mm, 1.27 mm pitch | β |
| Package Type | FBGA | β |
| Mounting Type | Surface Mount | Surface mount |
| Supply Voltage | 1.71 V to 1.89 V | 1.8 V |
| Operating Temperature | 0 C to 85 C | 0Β°C to 85Β°C |
| Fabrication Process | 0.15 um | 0.15 Β΅m |
| RoHS Status | Non-compliant | unknown |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | β |
| Configuration Interface | [DATA_NEEDED: configuration interface] | β |
| Maximum Core Frequency | [DATA_NEEDED: maximum core frequency] | β |
| Product Type | β | FPGA / programmable logic device |
| Family | β | APEX 20KC |
| Nominal Gate Capacity | β | 600K gates |
| Logic Elements or Cells | β | 24,320 |
| Macros | β | 2,432 |
| Package Terminals | β | 652 pins |
| Package | β | BGA-652, 45 x 45 mm, 1.27 mm pitch |
| Package Description | β | 672-pin FC-FBGA |
| Listed Frequency | β | 301.21 MHz |
| Interconnect Metal | β | All-layer copper metal |
| I/O Configuration | β | 508 user I/O |
| REACH Status | β | unknown |
| AEC-Q100 Qualification | β | unknown |
| Configuration Method | β | [DATA_NEEDED: configuration memory and programming method] |
| Core Current | β | [DATA_NEEDED: core supply current] |
| I/O Bank Voltage | β | [DATA_NEEDED: supported I/O voltage range] |
| Junction Temperature | β | [DATA_NEEDED: maximum junction temperature] |
| Thermal Resistance | β | [DATA_NEEDED: junction-to-ambient thermal resistance] |