EP20K600EBC652-2X vs EP20K600EBI652-2X Comparison
Detailed side-by-side comparison of EP20K600EBC652-2X by Altera and EP20K600EBI652-2X by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K600EBI652-2X - 600K Gate APEX 20KE FPGA 488 I/O BGA-652 | Intel
EP20K600EBI652-2X ObsoleteSpecification Comparison
| Parameter | EP20K600EBC652-2X | EP20K600EBI652-2X |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Family | APEX 20KE | — |
| Device Type | SPLD / FPGA (Field Programmable Gate Array) | — |
| Logic Elements (LEs) | 24,320 | — |
| Macros | 24,320 | — |
| Embedded Memory Bits | 311,296 bits | — |
| User I/Os | 488 | 488 |
| Package | 652-ball BGA, 45 x 45 mm, 1.27 mm pitch | 652-ball BGA (45 x 45 mm, 1.27 mm pitch, thermally enhanced) |
| Total Pins / Balls | 652 | — |
| Propagation Delay | 1.48 ns | 1.48 ns |
| Operating Temperature | 0 °C to +85 °C (commercial) | 0 C to 85 C (commercial) |
| Process Technology | 0.15 µm all-layer copper CMOS | 0.18 µm all-layer copper CMOS |
| Core Supply Voltage | 2.5 V | — |
| I/O Standard Support | LVTTL, LVCMOS, PCI, SSTL, GTL+ | — |
| Configuration Modes | Passive serial, passive parallel, JTAG (IEEE 1149.1) | — |
| Mounting Type | Surface Mount | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | Lead-free / RoHS compliant |
| Family | — | APEX 20KE |
| Logic Elements | — | 24,320 cells |
| Maximum Gates | — | 600,000 gates |
| Embedded RAM | — | 311 Kbits |
| Dedicated Inputs | — | 4 |
| Maximum Operating Frequency | — | 200 MHz |
| Core Voltage | — | 1.8 V |
| Speed Grade | — | -2X (mid-tier) |
| PLLs | — | 4 |
| MultiVolt I/O Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Configuration Method | — | Serial/parallel EPROM, JTAG, controller |