EP2A40F672C7N vs EP2A40F672C6 Comparison
Detailed side-by-side comparison of EP2A40F672C7N by Intel and EP2A40F672C6 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2A40F672C7N | EP2A40F672C6 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Family | APEX II | APEX II |
| Logic Elements / Cells | 38,400 | — |
| System Gates | 1.5 M | — |
| Maximum User I/Os | 492 | — |
| Propagation Delay (tpd) | 1.55 ns | — |
| Internal Performance | 562 MHz | — |
| Process Technology | 0.15 µm CMOS, all-layer copper, up to 8 metal layers | 0.18-micron CMOS |
| Core Voltage | 1.5 V | — |
| MultiVolt I/O Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V | — |
| Logic Family | CMOS | — |
| Package | 672-ball FC-FBGA (FineLine BGA), S-PBGA-B672, 27 x 27 mm, 1.0 mm pitch | 672-ball FineLine BGA (FBGA-672) |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Operating Temperature | 0 °C to 85 °C (commercial, 'C' grade) | Commercial (0C to +85C) |
| Speed Grade | 7 | C6 (commercial) |
| Lead-Free / RoHS | Yes (N suffix) | — |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | — |
| Device | — | EP2A40 |
| Logic Elements (typical) | — | 40,000 |
| Maximum System Gates | — | [DATA_NEEDED: maximum system gates] |
| Embedded System Blocks (ESBs) | — | [DATA_NEEDED: ESB count] |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O count] |
| Configuration Memory | — | SRAM-based |
| JTAG Support | — | Yes (IEEE 1149.1) |
| PLL Support | — | Yes |
| RoHS Status | — | [DATA_NEEDED: RoHS status] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Lifecycle | — | Obsolete / EOL (per Intel/Altera product discontinuation notice) |