EP2S60F672C5N vs EP2S60F67214N Comparison
Detailed side-by-side comparison of EP2S60F672C5N by Altera and EP2S60F67214N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2S60F672C5N | EP2S60F67214N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | Stratix II | Stratix II |
| Logic Elements (LEs) | 60440 | — |
| Logic Array Blocks (LABs) | 3022 | — |
| Embedded Memory (bits) | 2544192 | — |
| Maximum User I/Os | 492 | — |
| Process Technology | 90 nm | 90 nm CMOS |
| Core Voltage (VCCINT) | 1.2 V | — |
| Maximum Internal Frequency | 609.76 MHz | — |
| Package | 672-ball FC-FBGA | 672-ball FBGA (FineLine BGA) |
| Mounting Type | Surface Mount | Surface Mount |
| Speed Grade | C5 (commercial) | I4 (industrial, fast) |
| Temperature Grade | Commercial | — |
| MSL Level | [DATA_NEEDED: MSL level] | 3 (168 hours floor life) |
| RoHS Status | Non-compliant (contains lead, per Altera/Intel EOL notice) | Lead-free / RoHS compliant |
| Configuration Memory | SRAM-based (volatile, requires external configuration device) | — |
| Logic Elements | — | 60,440 LE |
| Total RAM Bits | — | 2,544,192 bit (2.5 Mbit) |
| DSP Blocks | — | 12 |
| Phase-Locked Loops (PLLs) | — | 4 |
| Operating Temperature | — | -40C to +100C (industrial) |
| Core Voltage | — | 1.2 V (typical) |
| I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O count for FBGA-672] |
| Configuration | — | SRAM-based, configured via bitstream |