EP2SGX90EF1152C4 vs EP2SGX90EF1152C4N Comparison
Detailed side-by-side comparison of EP2SGX90EF1152C4 by Altera and EP2SGX90EF1152C4N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP2SGX90EF1152C4N - Stratix II GX FPGA, 90960 LE, 1152-FBGA | Intel
EP2SGX90EF1152C4N β Last Time BuySpecification Comparison
| Parameter | EP2SGX90EF1152C4 | EP2SGX90EF1152C4N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $890.00 | $695.00 |
| Product Type | Field Programmable Gate Array (FPGA) | β |
| Family | Stratix II GX | Stratix II GX |
| Logic Cells | 90960 cells | β |
| Logic Array Blocks | 4548 LABs | β |
| User I/O | 558 I/O | β |
| Process Technology | 90 nm | β |
| Core Voltage | 1.2 V | 1.2 V |
| Reported Maximum Frequency | 732.1 MHz | β |
| Alternate Reported Maximum Frequency | 717 MHz | β |
| Package Type | FC-FBGA | β |
| Package Pin Count | 1152 pins | β |
| Alternate Package Description | FBGA-1152 | β |
| Package Mounting | Surface Mount | β |
| Lead-Free Status | Lead free | β |
| RoHS Status | RoHS Compliant | β |
| Operating Temperature | [DATA_NEEDED: operating temperature] | Commercial (0C to +85C) |
| Transceiver Count | [DATA_NEEDED: transceiver count] | β |
| Configuration Method | [DATA_NEEDED: configuration method] | β |
| Logic Elements (LE) | β | 90,960 |
| LABs/CLBs | β | 4,548 |
| Total RAM Bits | β | 4,520,448 bits |
| User I/O Count | β | 558 |
| Number of I/O Banks | β | [DATA_NEEDED: number of I/O banks] |
| Process Node | β | 90 nm |
| Transceivers | β | Up to 20 channels, 6.375 Gbps per channel |
| Speed Grade | β | C4 |
| Package | β | 1152-BBGA / FC-FBGA-1152 |
| Mounting Type | β | Surface Mount (BGA) |
| MSL Level | β | MSL-3 / MS-034AAR-1 (per package outline) |
| Lead-Free / RoHS | β | Lead free; RoHS compliance per JEDEC |