EP2SGX90EF1152C4ES vs EP2SGX90EF1152C3ES Comparison
Detailed side-by-side comparison of EP2SGX90EF1152C4ES by Intel and EP2SGX90EF1152C3ES by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP2SGX90EF1152C3ES - Stratix II GX FPGA 90nm 558 I/O 1152-BBGA | Intel
EP2SGX90EF1152C3ES β Last Time BuySpecification Comparison
| Parameter | EP2SGX90EF1152C4ES | EP2SGX90EF1152C3ES |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $305.00 | $2,050.00 |
| Manufacturer | Intel (formerly Altera) | β |
| Series | Stratix II GX | β |
| Logic Elements | 90960 | 90,960 |
| Total RAM Bits | 4520448 | β |
| Number of I/O | 558 | β |
| Voltage - Supply (Core) | 1.2 V | β |
| Process Technology | 90 nm | β |
| Maximum Operating Frequency | 732.1 MHz | β |
| Package / Case | 1152-BBGA, FCBGA | β |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Operating Temperature | Commercial Extended | β |
| RoHS Status | Non-compliant (per one distributor listing) | Compliant |
| Configuration Method | Passive Serial / Fast Passive Parallel / JTAG | β |
| Embedded Transceivers | Multi-gigabit SERDES (per Stratix II GX family) | β |
| Embedded DSP Blocks | Yes (per Stratix II GX family) | β |
| Family | β | Stratix II GX |
| Process Node | β | 90 nm |
| Embedded Memory | β | 4,520,448 bits (approx. 4.5 Mbit) |
| User I/O Pins | β | 558 |
| Package | β | 1152-BBGA (FineLine BGA, 35x35 mm) |
| Speed Grade | β | C3 |
| Temperature Grade | β | Commercial Extended (-40 C to +100 C) |
| Core Voltage | β | 1.5 V (Enhanced, 'E' suffix) |
| High-Speed Transceivers | β | Up to 12 channels (per Stratix II GX family) |
| Transceiver Data Rate | β | Up to 6.375 Gbps per channel (family spec) |
| DSP Blocks | β | Yes, dedicated 18x18 multipliers and accumulators |
| PLL Count | β | [DATA_NEEDED: PLL count for EP2SGX90 variant] |
| User I/O Banks | β | 24 (per package datasheet) |
| Configuration | β | SRAM-based, supports Fast Passive Parallel, Fast Active Serial, JTAG |
| Lead-Free | β | Yes |