EP610ILC-10 vs EP610ILC-25 Comparison

Detailed side-by-side comparison of EP610ILC-10 by Altera and EP610ILC-25 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP610ILC-10 EP610ILC-25
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $7.20 $9.85
Device Family Classic EPLD β€”
Product Type UV-Erasable / OTP PLD β€”
Architecture PAL-type with macrocells β€”
Macrocells 16 16
Usable Gates 300 300
Product Terms 160 160
I/O Pins 16 β€”
Dedicated Inputs 4 4
Supply Voltage 5 V (single supply) β€”
Pin-to-Pin Delay (tPD) 10 ns (grade -10) β€”
Counter Frequency (fCNT) 100 MHz β€”
Logic Family Compatibility TTL (5 V CMOS/TTL-compatible I/O) β€”
Package PLCC-28 (plastic J-lead chip carrier) 28-pin PLCC (J-lead)
Mounting Type Surface Mount (PLCC socket or solder) Surface Mount
Operating Temperature [DATA_NEEDED: operating temperature range] β€”
RoHS Status [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status]
Family β€” Classic EPLD (EP610 series)
Device Type β€” EEPLD (Electrically Erasable PLD)
Maximum Operating Frequency (fMAX) β€” 40 MHz
Pin-to-Pin Propagation Delay (tPD) β€” 25 ns
Supply Voltage (VCC) β€” 4.75 V to 5.25 V
Nominal Supply Voltage β€” 5 V
Total Inputs β€” 20
Bidirectional I/O Pins β€” 16
Operating Temperature Range β€” 0 C to +70 C (commercial)
Process Technology β€” CMOS, electrically erasable
Programming Method β€” In-system, electrically erasable

Datasheets & Resources

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