EP610PC-15 vs EP610PC30 Comparison
Detailed side-by-side comparison of EP610PC-15 by Altera and EP610PC30 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610PC-15 | EP610PC30 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $17.50 | $42.00 |
| Family | Classic EPLD | Classic EP610 |
| Device Type | EPLD (Erasable Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | 300 gates | 300 |
| Macrocells | 16 | 16 |
| Logic Delay (tPD) | 15 ns (pin-to-pin, -15 speed grade) | β |
| Maximum Counter Frequency | 100 MHz (per family datasheet) | β |
| Pipelined Data Rate | Up to 100 MHz | Up to 100 MHz |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V |
| Technology | CMOS | CMOS |
| Architecture | PAL-type, sum-of-products AND/OR array | β |
| TTL Emulation | 100% TTL compatible | β |
| Package | PDIP-24 (plastic DIP, 24-pin) | PDIP-24 |
| Pin Count | 24 pins | β |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Mounting Type | Through-Hole (DIP) | Through-Hole |
| RoHS Status | [DATA_NEEDED: RoHS status] | Not applicable (legacy through-hole, contains Pb per historical datasheet) |
| Development Tool | Altera MAX+PLUS II | β |
| Logic Test Circuitry | On-board for AC/DC verification | β |
| Propagation Delay (tPD) | β | 30 ns |
| Maximum Toggle Frequency | β | 33.3 MHz |
| Programming | β | EPROM/EEPROM-based, MAX+plus II toolchain |
| Logic Capacity | β | 16 macrocells / 300 gates equivalent |
| Configuration Memory | β | Non-volatile (UV-erasable or OTP variant) |
| Manufacturer (Original) | β | Altera Corporation (now Intel FPGA) |
| Current Distributor | β | Rochester Electronics, LLC |