EP610PC30 vs EP610PC-20 Comparison
Detailed side-by-side comparison of EP610PC30 by Altera and EP610PC-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610PC30 | EP610PC-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EP610 | Classic EPLD |
| Macrocells | 16 | — |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 30 ns | 20 ns |
| Maximum Toggle Frequency | 33.3 MHz | — |
| Pipelined Data Rate | Up to 100 MHz | — |
| Supply Voltage (VCC) | 5 V | 5 V ±10% |
| Technology | CMOS | — |
| Package | PDIP-24 | PDIP-24 |
| Mounting Type | Through-Hole | — |
| Programming | EPROM/EEPROM-based, MAX+plus II toolchain | — |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| RoHS Status | Not applicable (legacy through-hole, contains Pb per historical datasheet) | Non-compliant (legacy PDIP) |
| Logic Capacity | 16 macrocells / 300 gates equivalent | — |
| Configuration Memory | Non-volatile (UV-erasable or OTP variant) | — |
| Manufacturer (Original) | Altera Corporation (now Intel FPGA) | — |
| Current Distributor | Rochester Electronics, LLC | — |
| Logic Elements | — | 16 macrocells |
| Maximum Operating Frequency | — | 100 MHz (pipelined) |
| Number of Pins | — | 24 |
| Process Technology | — | CMOS EPROM |
| Programmable Flip-Flops | — | 16 |
| Input Pins | — | 24 |
| Output Pins | — | 16 |
| I/O Compatibility | — | TTL |
| Program/Erase Method | — | UV (windowed) or OTP |