EP910ILC-15 vs EP910ILI-25 Comparison
Detailed side-by-side comparison of EP910ILC-15 by Intel and EP910ILI-25 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910ILC-15 | EP910ILI-25 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Family | Classic EPLD | — |
| Series | EP910 | EP910 (Classic EPLD) |
| Logic Gates | 450 | — |
| Macrocells | 24 | 24 |
| User I/O Pins | 36 | — |
| Propagation Delay (tPD) | 15 ns | 25 ns |
| Maximum Operating Frequency | 83.33 MHz | — |
| Supply Voltage | 5 V | — |
| Memory Type | EPROM (UV-erasable) | — |
| Operating Temperature | -40C to +85C (industrial) | -40C to +85C (Industrial) |
| Package | 44-pin PLCC (J-lead) | PLCC-44 (windowed ceramic, J-lead) |
| Mounting Type | Surface Mount (SMT) | — |
| Propagation Class | -15 speed grade | — |
| Storage Condition | Dry cabinet, humidity-controlled | — |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | Non-compliant (windowed ceramic package) |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Dedicated Inputs | — | 12 |
| I/O Pins | — | 24 |
| Product Terms | — | 240 (maximum) |
| Technology | — | CMOS, EPROM |
| Architecture | — | PAL-type with global interconnect bus |
| Operating Voltage | — | 5 V (4.75 V to 5.25 V) |
| Programming Method | — | UV-erasable (windowed), MAX+PLUS II programmer |
| Logic Test Circuitry | — | On-board JTAG-compatible test |